Displaying 4 results from an estimated 4 matches for "mmio_list".
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2014 Jun 07
0
[PATCH] drm/gk208/gr: add missing registers to grctx init
...s/gpu/drm/nouveau/core/engine/graph/ctxnv108.c
index 48351b4..8de4a42 100644
--- a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnv108.c
+++ b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnv108.c
@@ -545,10 +545,12 @@ nv108_grctx_generate_mods(struct nvc0_graph_priv *priv, struct nvc0_grctx *info)
mmio_list(0x408010, 0x80000000, 0, 0);
mmio_list(0x419004, 0x00000000, 8, 1);
mmio_list(0x419008, 0x00000000, 0, 0);
+ mmio_list(0x4064cc, 0x80000000, 0, 0);
mmio_list(0x408004, 0x00000000, 8, 0);
mmio_list(0x408008, 0x80000030, 0, 0);
mmio_list(0x418808, 0x00000000, 8, 0);
mmio_list(0x418...
2013 Dec 25
1
[PATCH] drm/nve4: fix size of POLY2ESETUP buffer (s/gpc_nr/tpc_total)
..._priv *priv, struct nvc0_grctx *info)
mmio_data(0x003000, 0x0100, NV_MEM_ACCESS_RW | NV_MEM_ACCESS_SYS);
mmio_data(0x008000, 0x0100, NV_MEM_ACCESS_RW | NV_MEM_ACCESS_SYS);
- mmio_data(0x060000, 0x1000, NV_MEM_ACCESS_RW);
+ mmio_data(priv->tpc_total << 17, 0x1000, NV_MEM_ACCESS_RW);
mmio_list(0x40800c, 0x00000000, 8, 1);
mmio_list(0x408010, 0x80000000, 0, 0);
mmio_list(0x419004, 0x00000000, 8, 1);
--
1.8.1.5
2014 Jun 07
0
[RFC PATCH] drm/gk208/gr: adjust a couple of init values
...8
RAMIN32 1b5080 7fce1080 <= 17e91c
RAMIN32 1b5084 7fce1084 <= b030a0c
MMIO32 W 0x070000 0x00000001 PFIFO_FLUSH.FLUSH_CTRL <= { TRIGGER }
MMIO32 R 0x070000 0x00000000 PFIFO_FLUSH.FLUSH_CTRL => { 0 }
RAMIN32 1b5088 7fce1088 <= 17e920
RAMIN32 1b508c 7fce108c <= 90d08
So perhaps the mmio_list needs to grow a mask option (and have it store the
mask)? Not sure what any of this means, and doing this didn't fix
anything. So... this is more informational than to be applied
necessarily. Although the values that 337.25 writes on the GK208 I was testing
on (GT630, 10de:1284) were different...
2013 Dec 25
0
[PATCH] drm/nve4: fix size of POLY2ESETUP buffer
...aph_priv *priv, struct nvc0_grctx *info)
mmio_data(0x003000, 0x0100, NV_MEM_ACCESS_RW | NV_MEM_ACCESS_SYS);
mmio_data(0x008000, 0x0100, NV_MEM_ACCESS_RW | NV_MEM_ACCESS_SYS);
- mmio_data(0x060000, 0x1000, NV_MEM_ACCESS_RW);
+ mmio_data(priv->gpc_nr << 17, 0x1000, NV_MEM_ACCESS_RW);
mmio_list(0x40800c, 0x00000000, 8, 1);
mmio_list(0x408010, 0x80000000, 0, 0);
mmio_list(0x419004, 0x00000000, 8, 1);
--
1.8.1.5