search for: misalignments

Hi, I'm not sure what I'm doing wrong here. With the single source file attached to this email, I tried the following commands: llvmgcc -o timeLLVMfft timeLLVMfft.c -lm llc -o timeLLVMfft.s timeLLVMfft.bc /opt/SUNWspro/bin/cc -xarch=v9 -o timeLLVMfft.sparc timeLLVMfft.s I got the errors at the bottom of this email in response to the last command. On the other hand, gcc v2.95.3 had

https://bugs.freedesktop.org/show_bug.cgi?id=27680 Summary: Misaligned reg ... nVidia Corporation C67 [GeForce 7150M / nForce 630M] (rev a2) Product: xorg Version: git Platform: x86-64 (AMD64) OS/Version: Linux (All) Status: NEW Severity: major Priority: medium Component: Driver/nouveau

Thanks to Jakob's work on Sparcv9 ABI in Clang and recent changes to Sparc code generator, I am happy to announce that Clang can self host itself on Linux/Sparc64 and on FreeBSD/Sparc64. However, it still fails on a few unit tests and nightly tests, primarily due to misaligned memory accesses in the code (See bugs 18482, 18500, 18502, 18536, 18693). Unlike other architectures, misaligned

I'm trying to determine how to do my packed structure compilation and am a bit unclear about how packed structures are handled. Consider this structure: %struct.packed = type <{ i8, i32 }> Now if I get a pointer to the i32 element the pointer will not be properly aligned for a typical i32. On my current machine (x86_64) the cpu doesn't seem to care, but I suspect this isn't

http://bugs.freedesktop.org/show_bug.cgi?id=24295 Summary: No Boot With Nouveau DRM - C51 misaligned reg 0x0000#### not verified Product: xorg Version: unspecified Platform: x86-64 (AMD64) OS/Version: Linux (All) Status: NEW Severity: critical Priority: highest Component: Driver/nouveau

https://bugs.freedesktop.org/show_bug.cgi?id=47182 Bug #: 47182 Summary: GeFroce 6150SE nForce 430: misaligned reg 0x0060081D Classification: Unclassified Product: xorg Version: 7.6 (2010.12) Platform: x86 (IA32) OS/Version: Linux (All) Status: NEW Severity: normal Priority: medium

This maybe a basic question, but I have spent several hours researching and I could not get an answer, so please bear with me. The problem is with time series in the package tseries. As the example below shows, the time series can get misaligned, so that bad results are obtained when doing regressions. I found a way to do this correctly, but I find it rather cumbersome. My question is: is there a

On Thu, Nov 10, 2011 at 6:13 PM, Aaron Dwyer <Aaron.Dwyer at imgtec.com> wrote: > Using LLVM 2.9, the following LLVM IR produces invalid x86 32 bit assembly > (a misaligned SSE store). > ; ModuleID = 'MisalignedStore' > define void @MisalignedStore() nounwind readnone { > entry: >   %v = alloca <4 x float>, align 16 >   store <4 x float>

Using LLVM 2.9, the following LLVM IR produces invalid x86 32 bit assembly (a misaligned SSE store). ; ModuleID = 'MisalignedStore' define void @MisalignedStore() nounwind readnone { entry: %v = alloca <4 x float>, align 16 store <4 x float> zeroinitializer, <4 x float>* %v, align 16 br label %post-block post-block: %f = alloca float ret void } If I feed

Hi edA-qa mort-ora-y, On 12/05/13 17:13, edA-qa mort-ora-y wrote: > I'm trying to determine how to do my packed structure compilation and am > a bit unclear about how packed structures are handled. Consider this > structure: > > %struct.packed = type <{ i8, i32 }> > > Now if I get a pointer to the i32 element the pointer will not be > properly aligned for a

Hi, NetApp support has suggested us aligning partitions to improve performance, in short: starting sector must be divisible by 8. How can I move the start point in a misaligned partition -in production, with ext3- under Linux? A screenshot with a misaligned (start=63s) and aligned (start=64s) partition is available at: http://filesocial.com/lkwvvn2 (If anyone is interested in this topic,

On Sun, Feb 2, 2014 at 11:50 AM, Anton Korobeynikov <anton at korobeynikov.info> wrote: > That's really cool! Should we add note to Release Notes? Definitely. I will add a note mentioning about this in ReleaseNotes.rst. > > On Sun, Feb 2, 2014 at 8:05 PM, Venkatraman Govindaraju > <venkatra at cs.wisc.edu> wrote: >> Thanks to Jakob's work on Sparcv9 ABI in

Am 22.04.2016 um 12:40 schrieb g <geleem at bellsouth.net>: > greetings. > > centos 6.7 [current] > > > 'disk utility' has started showing message; > > WARNING: The partition is misaligned by 2560 bytes. This may > result in very poor performance. Repartitioning is suggested. > > for sdc5 - /home partition. > > /dev/sdc5 302243312

> I've seen the exact same in my version (mingw on win32), and the problem > was that the stack was misaligned when entering the function, so the temp > registers weren't at 16-byte boundries. That's a possibility. It's easy to check by printing the address of the variables. I know that gcc 3.3 had some alignment issues with _m128 that were supposed to be fixed in

Hello, I recently noticed a small bug in the doveadm table formatter: hidden titles may cause the headers to be misaligned. The behavior in question was introduced by commit <http://hg.dovecot.org/dovecot-2.2/rev/210282ae46e1> and doveadm -f table quota get -A may be used to reproduce it. Most simple patch attached: it simply restores the old behavior, to some extent. Actually hiding

An NA in the rownames of a matrix (or dataframe) causes misalignment when the matrix is printed: R> x <- matrix(1:12, 3,4, dimnames=list(letters[1:3], LETTERS[1:4])) R> rownames(x)[2] <- NA R> x A B C D a 1 4 7 10 <NA> 2 5 8 11 c 3 6 9 12 The bug is in function Rstrlen, in src/main/printutils.c. MatrixRowLabel and MatrixColumnLabel (same file) rely on Rstrlen

Dear R-helpers: I am an entry-level R user and have a question related to overlaying a barchart and and a xyplot using latticeExtra. My problem is that when I overlay them I fail to align their x-axes. I show my problem below through an example. #the example data frame is provided below vec <-c(1,5.056656,0.5977967,0.06126587,0.08557778, 2,4.601049,0.5995989,0.05002188,0.11410027,

hi, haven't got the chance to sit down and look into it. from what I read in the list, double talk detection is in the pipeline... :D. Just 2 quick questions: i) does this canceller handle wideband for speex wideband? ii) does it handle feedback or howling? Lastly, a newbie question for echo cancellation: is there a convenient test to ensure that the input and output buffers obtained from

Hello, Anton, I'd like to add a small reply regarding this GSoC project that I would like to mentor and I discussed also with Andrei. A good part of our GSoC project is indeed related to this Connex back end that it's not yet part of the LLVM source repository - an important thing proposed in the project is that we plan to perform efficient realignment for this Connex vector

Hi all, I was wondering if there is a defined ABI for passing vector as parameter for ARM target. For instance is this valid to write .ll statement like: ; ModuleID = 'bugconv.ll' target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-n32" target triple = "thumbv7-none-linux-androideabi" define