Displaying 2 results from an estimated 2 matches for "misalignedstor".
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misalignedstore
2011 Nov 11
3
[LLVMdev] Misaligned SSE store problem (with reduced source)
Using LLVM 2.9, the following LLVM IR produces invalid x86 32 bit assembly (a misaligned SSE store).
; ModuleID = 'MisalignedStore'
define void @MisalignedStore() nounwind readnone {
entry:
%v = alloca <4 x float>, align 16
store <4 x float> zeroinitializer, <4 x float>* %v, align 16
br label %post-block
post-block:
%f = alloca float
ret void
}
If I feed this to llc with -march=x86, the foll...
2011 Nov 11
0
[LLVMdev] Misaligned SSE store problem (with reduced source)
On Thu, Nov 10, 2011 at 6:13 PM, Aaron Dwyer <Aaron.Dwyer at imgtec.com> wrote:
> Using LLVM 2.9, the following LLVM IR produces invalid x86 32 bit assembly
> (a misaligned SSE store).
> ; ModuleID = 'MisalignedStore'
> define void @MisalignedStore() nounwind readnone {
> entry:
> %v = alloca <4 x float>, align 16
> store <4 x float> zeroinitializer, <4 x float>* %v, align 16
> br label %post-block
> post-block:
> %f = alloca float
> ret void
> }
>...