Displaying 5 results from an estimated 5 matches for "mipsgenasmwrit".
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mipsgenasmwriter
2014 Apr 24
3
[LLVMdev] tablegen for fast isel
What is the purpose of tablegen created files for fast-isel?
If I make the following change to Makefile in lib/Target/Mips
BUILT_SOURCES = MipsGenRegisterInfo.inc MipsGenInstrInfo.inc \
MipsGenAsmWriter.inc MipsGenCodeEmitter.inc \
MipsGenDAGISel.inc MipsGenCallingConv.inc \
- MipsGenSubtargetInfo.inc MipsGenMCCodeEmitter.inc \
+ MipsGenSubtargetInfo.inc MipsGenFastISel.inc
MipsGenMCCodeEmitter.inc \
MipsGenDisassemblerTables.inc...
2012 Jan 26
2
[LLVMdev] HELP - tblgen -gen-asm-matcher restrictions on .td content
...latform we create the following .inc files through tblgen.
tablegen(LLVM MipsGenRegisterInfo.inc -gen-register-info)
tablegen(LLVM MipsGenInstrInfo.inc -gen-instr-info)
tablegen(LLVM MipsGenCodeEmitter.inc -gen-emitter)
tablegen(LLVM MipsGenMCCodeEmitter.inc -gen-emitter -mc-emitter)
tablegen(LLVM MipsGenAsmWriter.inc -gen-asm-writer)
tablegen(LLVM MipsGenDAGISel.inc -gen-dag-isel)
tablegen(LLVM MipsGenCallingConv.inc -gen-callingconv)
tablegen(LLVM MipsGenSubtargetInfo.inc -gen-subtarget)
add_public_tablegen_target(MipsCommonTableGen)
When I started trying to generate MipsGenAsmMatcher.inc for the assemb...
2012 Dec 19
0
[LLVMdev] question about printAliasInstr
I am considering using MipsInstPrinter::printAliasInstr, which is
auto-generated in MipsGenAsmWriter.inc, to print assembly idioms defined as
instruction aliases. For example, an instruction which used to be printed
as
"nor $1, $2, $zero"
can be printed as
"not $1, $2"
This is nice because it makes the code printed by code-gen or disassembler
more readable.
However, the...
2012 Feb 03
0
[LLVMdev] HELP - tblgen -gen-asm-matcher restrictions on .td content
...g .inc files through tblgen.
>
> tablegen(LLVM MipsGenRegisterInfo.inc -gen-register-info)
> tablegen(LLVM MipsGenInstrInfo.inc -gen-instr-info)
> tablegen(LLVM MipsGenCodeEmitter.inc -gen-emitter)
> tablegen(LLVM MipsGenMCCodeEmitter.inc -gen-emitter -mc-emitter)
> tablegen(LLVM MipsGenAsmWriter.inc -gen-asm-writer)
> tablegen(LLVM MipsGenDAGISel.inc -gen-dag-isel)
> tablegen(LLVM MipsGenCallingConv.inc -gen-callingconv)
> tablegen(LLVM MipsGenSubtargetInfo.inc -gen-subtarget)
> add_public_tablegen_target(MipsCommonTableGen)
>
> When I started trying to generate MipsGe...
2012 Nov 13
2
[LLVMdev] [PATCH] .gitignore: add rules for a clean worktree
...SP430GenDAGISel.inc
+MSP430GenInstrInfo.inc
+MSP430GenRegisterInfo.inc
+MSP430GenSubtargetInfo.inc
diff --git a/lib/Target/Mips/.gitignore b/lib/Target/Mips/.gitignore
new file mode 100644
index 0000000..27c073c
--- /dev/null
+++ b/lib/Target/Mips/.gitignore
@@ -0,0 +1,12 @@
+MipsGenAsmMatcher.inc
+MipsGenAsmWriter.inc
+MipsGenCallingConv.inc
+MipsGenCodeEmitter.inc
+MipsGenDAGISel.inc
+MipsGenDisassemblerTables.inc
+MipsGenEDInfo.inc
+MipsGenInstrInfo.inc
+MipsGenMCCodeEmitter.inc
+MipsGenMCPseudoLowering.inc
+MipsGenRegisterInfo.inc
+MipsGenSubtargetInfo.inc
diff --git a/lib/Target/NVPTX/.gitignore b/lib/...