search for: miflag

Displaying 9 results from an estimated 9 matches for "miflag".

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2014 Apr 17
2
[LLVMdev] adding comment
Would adding a flag to MachineInstr::MIFlag do the trick? I'm thinking that fast isel could ensure that a flag (e.g. MIFlag::FastISel) is added to the instructions it creates, then the instruction printer could optionally emit a comment for instructions that have this flag. > -----Original Message----- > From: llvmdev-bounces at c...
2014 Apr 22
3
[LLVMdev] adding comment
...Behalf Of Reed Kotler > Sent: 17 April 2014 16:30 > To: LLVMdev at cs.uiuc.edu > Subject: Re: [LLVMdev] adding comment > > Maybe adding it to CommentFlag would be slightly better. > > On 04/17/2014 02:23 AM, Daniel Sanders wrote: > > Would adding a flag to MachineInstr::MIFlag do the trick? I'm thinking that > fast isel could ensure that a flag (e.g. MIFlag::FastISel) is added to the > instructions it creates, then the instruction printer could optionally emit a > comment for instructions that have this flag. > > > >> -----Original Message----...
2013 Sep 20
2
[LLVMdev] Adding diversity for security (and testing)
...shouldn't be needed. Nuked. > Overall this looks like a great start. However, I would like some other people to review things: > - I don't actually approve lib/CodeGen and lib/Target changes. Somebody else is going to have to think about whether "InsertedNOP" belongs as an MIFlag. The reasoning behind making this an MIFlag was to be able to skip over NOPs in the terminators of a block. For uniform security we want to be able to place NOPs in the terminators, but still need to skip over them when finding the first terminator. > - I'm concerned about seeding the RNG...
2014 Apr 16
4
[LLVMdev] adding comment
Is there a simple way to add a comment in the machine instructions of a basic block? Ideally something that can be used with machine instruction builder. Tia. Reed
2013 Sep 20
0
[LLVMdev] Adding diversity for security (and testing)
...ever read it for anything? Nuke it? Overall this looks like a great start. However, I would like some other people to review things: - I don't actually approve lib/CodeGen and lib/Target changes. Somebody else is going to have to think about whether "InsertedNOP" belongs as an MIFlag. - I'm concerned about seeding the RNG. I'm especially concerned about seeding it in the LTO case, I hadn't thought of that until I saw it in the patch. I'm appreciate if somebody with a security background could ponder that one. - There's also a clang patch which shoul...
2013 Sep 19
2
[LLVMdev] Adding diversity for security (and testing)
Thanks for all the feedback! It seems there is some interest, so I thought I'd try to summarize discussions so far, and provide patches for closer inspection. I'm not sure if patches should end up here or on a different list in this instance, so if I should instead send this to a different list, I'm happy to do so. - Is diversity needed, or are existing protections sufficient? As
2017 Feb 17
7
RFC: Setting MachineInstr flags through storeRegToStackSlot
...ers to set the FrameSetup flag as well. 2) Like the above, but modify storeRegToStackSlot to return the number of MachineInstr inserted and use that value when marking instructions as FrameSetup. This is more invasive, as it will affect all in tree and out-of-tree backends. 3) Add a MachineInstr::MIFlag parameter to storeRegToStackSlot. The storeRegToStackSlot implementation is responsible for applying this flag to all inserted instructions. This could be defaulted to MachineInstr::NoFlags, to minimise changes to function callers, although that defaulted value would have to be replicated in all Fo...
2011 Sep 29
1
[LLVMdev] Marking machineinstructions that are spills generated by register allocation
...other memory operations, and our own instruction scheduler can optimize much better with better alias information. I have created a code which adds marking these spill instructions to the register allocators of llvm. In my implementation spills are marked into spill Machine instructions with MIFlag, adding there a flag bit for spills (currently there is only one flag bit, "FrameSetup" which is only used by x86 backend) My implementation requires just one 9-line function to VirtRegMap class, and a single call to that function in all register allocators. Does this sound reasonable/...
2017 Feb 21
3
RFC: Setting MachineInstr flags through storeRegToStackSlot
...bove, but modify storeRegToStackSlot to return the number > of > > MachineInstr inserted and use that value when marking instructions as > > FrameSetup. This is more invasive, as it will affect all in tree and > > out-of-tree backends. > > > > 3) Add a MachineInstr::MIFlag parameter to storeRegToStackSlot. The > > storeRegToStackSlot implementation is responsible for applying this flag > to > > all inserted instructions. This could be defaulted to > MachineInstr::NoFlags, > > to minimise changes to function callers, although that defaulted val...