search for: mfi

...ild a new instruction which has the 2nd and 3rd operands swapped (using BuildMI). Then I want to get rid of the original instruction. I had done some searching and found that eraseFromParent is used to do this so that's what I'm using in the code below: for (MachineFunction::iterator MFI = MF.begin(), E = MF.end(); MFI != E; ++MFI) { // for each instr MachineBasicBlock::instr_iterator II = MFI->instr_begin(); while( II != MFI->instr_end()) { opcode = II->getOpcode(); if(II->isCommutable() || isLoadRR(opcode)){...

...b/lib/CodeGen/ScheduleDAGInstrs.cpp @@ -475,7 +475,8 @@ static inline bool isGlobalMemoryObject(AliasAnalysis *AA, MachineInstr *MI) { // to deal with (i.e. volatile object). static inline bool isUnsafeMemoryObject(MachineInstr *MI, const MachineFrameInfo *MFI, - const DataLayout &DL) { + const DataLayout &DL, + AliasAnalysis *AA) { if (!MI || MI->memoperands_empty()) return true; // We purposefully do no check for ha...

...atch linked to from this PR, which seems very similar: > />/ > />/ http://www.freebsd.org/cgi/query-pr.cgi?pr=kern/140416 > />/ > />/ http://lists.freebsd.org/pipermail/freebsd-scsi/2011-March/004839.html > />/ > />/ The problem is also consistent with running mfiutil clearing the problem. > />/ > />/ I'm about to deploy mfi controllers in a similar configuration, so I'd be very curious about whether the patch fixes the problem for you. > />/ > /This looks promising, I'll give a try when I get a moment. Hi, Did the patch h...

Hi llvmdev, I'm trying to figure how llvm remembers stack slots allotted to callee saved registers on x86. In particular, llvm pushes registers in decreasing order of FrameIdxs [1], so the offsets they get (as returned by MFI->getObjectOffset) don't directly correspond to their actual stack locations. In X86FrameLowering's emitCalleeSavedFrameMoves, when emitting DWARF information, this discrepancy gets fixed up by subtracting the offset reported by MFI->getObjectOffset from the minimum offset for any CSR...

..., it parses // the register to find which set it is suppose to be in. // time is an artificial time used to denote whether an operand came // before or after another operand. unsigned time; time = 0; // Initialize time. // For each block: for( MachineFunction::iterator mfi=Fn.begin(), mfe=Fn.end(); mfi != mfe; ++mfi ) { // for each byte code line: for( MachineBasicBlock::iterator mbbi = mfi->begin(), mbbe = mfi->end(); mbbi != mbbe; ++mbbi ) { // for each variable used: for( int opi=0, ope=mbbi->getNumOperands(); opi !...

...nstrument soft had no problem fitting it: x <- structure(list(SPL = structure(c(1L, 1L, 2L, 2L, 3L, 3L, 4L, 4L, 5L, 5L, 6L, 6L, 7L, 7L), .Label = c("St1", "St2", "St3", "St4", "St5", "St6", "St7"), class = "factor"), MFI = c(10755.5, 9839, 5142.5, 4857, 1510.5, 1505, 502.5, 451, 215, 195.5, 58, 57, 15, 15), nom = c(206, 206, 125, 125, 68, 68, 38, 38, 24, 24, 13, 13, 6.5, 6.5), weights = c(0.0013946353028683, 0.00152454517735542, 0.00291686922702965, 0.00308832612723904, 0.0099304865938431, 0.00996677740863787, 0.02...

Team I have a Dell PowerEdge R720xd, with the Broadcom NetXtreme bcm5720. I found the following thread: http://forums.freebsd.org/showthread.php?t=31769 I find I am unable to use the NIC's (there are 4 on the server). When we put a cable into it we get a "watchdog timeout -- resetting" error, and the machine will pause for 5 or so seconds. IP may or may not come up randomly.

...king at other peephole optimizers passes, I couldn't see how to do this: #define BUILD_INS(opcode, new_reg, i) \ BuildMI(*MBB, MBBI, MBBI->getDebugLoc(), TII->get(X86::opcode)) \ .addReg(X86::new_reg, kill).addImm(i) for (MachineFunction::iterator MFI = MF.begin(), MFE = MF.end(); MFI != MFE; ++MFI) { MachineBasicBlock* MBB = MFI; for (MachineBasicBlock::iterator MBBI = MBB->begin(); MBBI != MBB->end(); ++MBBI) { MachineInstr *NewMI = NULL; OldMI = MBBI; // %EFLAGS<imp-def> is getting copi...

after rebooting I get very often: ... mfi0: COMMAND 0xffffff800132d990 TIMEOUT AFTER 659 SECONDS mfi0: COMMAND 0xffffff800132d990 TIMEOUT AFTER 689 SECONDS mfi0: COMMAND 0xffffff800132d990 TIMEOUT AFTER 719 SECONDS ... another reboot usualy fixes this. danny

...$this->error=EC_UNKNOWN; $this->error_raw = "Failed to establish TLS connection."; return false; } else { $this->loggedin = true; $starttls_response = $this->line=fgets($this->fp,1024); $errormsg .= _("MFI fgets ") . $starttls_response . '<br>'; print_errormsg($errormsg); // RFC says that we need to ask for the capabilities again $this->sieve_get_capability(); $this->loggedin = false; } } and could read MFI fgets &...

...derkeiler.com/Mailing-Lists/FreeBSD/questions/2008-01/msg00506.html I was reading the mailing list and found that some of the people are happily using this hardware with the latest FreeBSD: http://lists.freebsd.org/pipermail/freebsd-stable/2008-January/039675.html I just wonder what the status of mfi driver? Maybe it's not fully tested or there will be some important fixes before 7.0 final? We are going to try different RAID combinations but it definitely not working using 6x146GB as RAID5. Maybe someone could share the RAID combinations they successfully are running on? Thanks in advance...

Hi folks; I have acquired a rackmount Intel server with a RAID card in it that appears to be compatable with the MFI driver. To put it mildly, this thing SMOKES! It is SCREAMING fast. Insane, in fact. Ok, enough supurlatives. Now the question is this - exactly what board(s) will this driver support? Is it only the two that are listed in the hardware release notes? LSI has a number of "MegaRaid"...

...const TargetRegisterClass *RC, const TargetRegisterInfo *TRI ) const { PR_FUNCTION(); DebugLoc DL; if (MI != MBB.end()) DL = MI->getDebugLoc(); MachineFunction &MF = *MBB.getParent();MF.dump(); MachineFrameInfo &MFI = *MF.getFrameInfo(); unsigned Align = MFI.getObjectAlignment(MVT::i8); MachineMemOperand *MMO = MF.getMachineMemOperand(MachinePointerInfo::getFixedStack(MVT::i8), MachineMemOperand::MOStore, MFI.getObjectSize(MVT::i8),...

Hello, I'm trying to investigate and solve some postgres latency spikes that I'm seeing as a result of some behaviour in the syncer. This is with FreeBSD 8.2 (with some local modifications and backports, r231160 in particular). The system has an LSI 9261-8i RAID controller (backed by mfi(4)) and the database and WALs are on separate volumes, a RAID 6 and a RAID 1 respectively. It has about 96GB of RAM installed. What's happening is that the syncer tries to fsync a large database file and goes to sleep in getpbuf() with the corresponding vnode lock held and the following stack:...

Hi, I will soon be committing a change to MachineFrameInfo::CreateStackObject that removes the "bool MayNeedSP" parameter. This API change is part of larger patch that re-works stack layout passes to use analysis from the StackProtector pass to layout StackProtected objects (http://llvm-reviews.chandlerc.com/D2158). Out of tree targets will need to update their usage accordingly. The

...itself... diff --git a/lib/CodeGen/ScheduleDAGInstrs.cpp b/lib/CodeGen/ScheduleDAGInstrs.cpp index 00a0b0f..cd48f51 100644 --- a/lib/CodeGen/ScheduleDAGInstrs.cpp +++ b/lib/CodeGen/ScheduleDAGInstrs.cpp @@ -584,6 +584,25 @@ static bool MIsNeedChainEdge(AliasAnalysis *AA, const MachineFrameInfo *MFI, if (!MIa->hasOneMemOperand() || !MIb->hasOneMemOperand()) return true; + // If mem-operands show that the same address Value is used by both + // ("normal") instructions, simply check offsets and sizes of the + // accesses. + MachineMemOperand *MMOa = *MIa->memope...

...Sanjoy Das wrote: >> Hi llvmdev, >> >> I'm trying to figure how llvm remembers stack slots allotted to callee >> saved registers on x86. In particular, llvm pushes registers in >> decreasing order of FrameIdxs [1], so the offsets they get (as >> returned by MFI->getObjectOffset) don't directly correspond to their >> actual stack locations. In X86FrameLowering's >> emitCalleeSavedFrameMoves, when emitting DWARF information, this >> discrepancy gets fixed up by subtracting the offset reported by >> MFI->getObjectOffset...

...gister(); + SaveArgs = STI.getSaveArgs(); } bool X86FrameLowering::hasReservedCallFrame(const MachineFunction &MF) const { @@ -83,7 +84,7 @@ /// or if frame pointer elimination is disabled. bool X86FrameLowering::hasFP(const MachineFunction &MF) const { const MachineFrameInfo &MFI = MF.getFrameInfo(); - return (MF.getTarget().Options.DisableFramePointerElim(MF) || + return (MF.getTarget().Options.DisableFramePointerElim(MF) || SaveArgs || TRI->needsStackRealignment(MF) || MFI.hasVarSizedObjects() || MFI.isFrameAddressTaken() || MFI.hasOp...

On Sat, Aug 28, 2010 at 16:20:42 -0400, Jeff Kunkel wrote: > What I need to know is how to access the machine register classes. Also, I > need to know which virtual register is to be mapped into each specific > register class. I assume there is type information on the registers. I need > to know how to access it. MachineRegisterInfo::getRegClass will give you the TargetRegisterClass

...up to 128 bytes of stack space, don't have a frame // pointer, calls, or dynamic alloca then we do not need to adjust the // stack pointer (we fit in the Red Zone). if (Is64Bit && !Fn->hasFnAttr(Attribute::NoRedZone) && !needsStackRealignment(MF) && !MFI->hasVarSizedObjects() && // No dynamic alloca. !MFI->adjustsStack() && // No calls. !IsWin64) { // Win64 has no Red Zone uint64_t MinSize = X86FI->getCalleeSavedFrameSize(); if (HasFP)...