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2015 Jun 12
2
[LLVMdev] Prevent instruction selection from clobbering an implicit data dependence through flags?
...e I have this snippet of IR: ; (i) Write to flags tail call void @llvm.desradgcv2.mtcsr.n..s.i(i32 %written, i32 14) ; (ii) Some instructions in between %c = add i32 %a, %b %d = sub i32 0, %c ; (iii) Read from flags, i.e, %read := %written %read = tail call i32 @llvm.desradgcv2.mfcsr.s..i(i32 14) During instruction selection, a pattern selects the 'mtcsr' and 'mfcsr' instructions for the two intrinsic calls (i) and (iii), respectively. There are two choices for the instructions in the middle (ii): 1. A verbatim translation into an 'add' and a 'sub...