search for: memsdnod

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2009 Jul 31
4
[LLVMdev] RFC: SDNode Flags
Right now the MemSDNode keeps a volatile bit in the SubclassData to mark volatile memory operations. We have some changes we'd like to push back that adds a NonTemporal flag to MemSDNode to mark instructions where movnt (on x86) and other goodness can happen (we'll also add the TableGen patterns to properly sele...
2011 Apr 01
2
[LLVMdev] Assert in VerifySDNode
...ge----- > From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] > On Behalf Of Duncan Sands > Sent: Thursday, March 31, 2011 7:43 PM > To: llvmdev at cs.uiuc.edu > Subject: Re: [LLVMdev] Assert in VerifySDNode > > Hi Micah, > > > assert(!isa<MemSDNode>(N) && "Bad MemSDNode!"); > > you can't use getNode to allocate a MemSDNode because it does not > allocate > enough memory (MemSDNode has extra fields beyond the operands). > [Villmow, Micah] Duncan, thanks for the reply. But I don't see how I am gener...
2009 Aug 01
0
[LLVMdev] RFC: SDNode Flags
On Jul 31, 2009, at 11:26 AM, David Greene wrote: > Right now the MemSDNode keeps a volatile bit in the SubclassData to > mark > volatile memory operations. > > We have some changes we'd like to push back that adds a NonTemporal > flag > to MemSDNode to mark instructions where movnt (on x86) and other > goodness > can happen (we'll al...
2011 Mar 31
3
[LLVMdev] Assert in VerifySDNode
We are syncing to 2.9 and we are hitting an with our backend in VerifySDNode in SelectionDAG.cpp. The first assert here is failing assert(!isa<MemSDNode>(N) && "Bad MemSDNode!"); Now, this is new to 2.9 and I am trying to understand what is invalid about what I am generating. What I generate has worked fine from LLVM version 2.4 until now without causing any issues. This is occuring while I am attempting to lower a vector ex...
2011 Apr 01
0
[LLVMdev] Assert in VerifySDNode
Hi Micah, > assert(!isa<MemSDNode>(N) && "Bad MemSDNode!"); you can't use getNode to allocate a MemSDNode because it does not allocate enough memory (MemSDNode has extra fields beyond the operands). Ciao, Duncan.
2013 Feb 19
9
[LLVMdev] [RFC] Add Intel TSX HLE Support
...MemIntrinsicSDNode to specify XACQUIRE or XRELEASE hints This extra target flag is embedded into the SubclassData fields. The following is rationale how such target flags are embedded into SubclassData in SDNode here is the current SDNode class hierarchy of memory related nodes SDNode -> MemSDNode -> LSBaseNode -> LoadSDNode | + -> StoreSDNode + -> AtomicSDNode + -> MemIntrinsicSDNode here is the current SubclassData definitions: bit 0~1 : extension type used in LoadSDNode bit 0 : truncating sto...
2011 Apr 01
0
[LLVMdev] Assert in VerifySDNode
Hi Micah, >>> assert(!isa<MemSDNode>(N)&& "Bad MemSDNode!"); >> >> you can't use getNode to allocate a MemSDNode because it does not >> allocate >> enough memory (MemSDNode has extra fields beyond the operands). >> > [Villmow, Micah] Duncan, thanks for the reply. But I don...
2009 Aug 03
0
[LLVMdev] RFC: SDNode Flags
...sData, NodeId, NumOperands, and NumValues together are using 96 bits (assuming int is 32-bit and short is 16-bit). I think there is opportunity here to re-pack them and find quite a few bits for target specific data. Evan On Jul 31, 2009, at 11:26 AM, David Greene wrote: > Right now the MemSDNode keeps a volatile bit in the SubclassData to > mark > volatile memory operations. > > We have some changes we'd like to push back that adds a NonTemporal > flag > to MemSDNode to mark instructions where movnt (on x86) and other > goodness > can happen (we'll al...
2013 Feb 19
0
[LLVMdev] [RFC] Add Intel TSX HLE Support
...IRE or XRELEASE hints > This extra target flag is embedded into the SubclassData fields. The > following is rationale how such target flags are embedded into > SubclassData in SDNode > > here is the current SDNode class hierarchy of memory related nodes > > SDNode -> MemSDNode -> LSBaseNode -> LoadSDNode > | + -> StoreSDNode > + -> AtomicSDNode > + -> MemIntrinsicSDNode > > here is the current SubclassData definitions: > > bit 0~1 : extension type used in Lo...
2013 Feb 19
0
[LLVMdev] [RFC] Add Intel TSX HLE Support
...IRE or XRELEASE hints > This extra target flag is embedded into the SubclassData fields. The > following is rationale how such target flags are embedded into > SubclassData in SDNode > > here is the current SDNode class hierarchy of memory related nodes > > SDNode -> MemSDNode -> LSBaseNode -> LoadSDNode > | + -> StoreSDNode > + -> AtomicSDNode > + -> MemIntrinsicSDNode > > here is the current SubclassData definitions: > > bit 0~1 : extension type used in Lo...
2013 Feb 19
0
[LLVMdev] [RFC] Add Intel TSX HLE Support
...IRE or XRELEASE hints > This extra target flag is embedded into the SubclassData fields. The > following is rationale how such target flags are embedded into > SubclassData in SDNode > > here is the current SDNode class hierarchy of memory related nodes > > SDNode -> MemSDNode -> LSBaseNode -> LoadSDNode > | + -> StoreSDNode > + -> AtomicSDNode > + -> MemIntrinsicSDNode > > here is the current SubclassData definitions: > > bit 0~1 : extension type used in Lo...
2013 Feb 19
2
[LLVMdev] [RFC] Add Intel TSX HLE Support
...MemIntrinsicSDNode to specify XACQUIRE or XRELEASE hints This extra target flag is embedded into the SubclassData fields. The following is rationale how such target flags are embedded into SubclassData in SDNode here is the current SDNode class hierarchy of memory related nodes SDNode -> MemSDNode -> LSBaseNode -> LoadSDNode | + -> StoreSDNode + -> AtomicSDNode + -> MemIntrinsicSDNode here is the current SubclassData definitions: bit 0~1 : extension type used in LoadSDNode bit 0 : truncating sto...
2013 Feb 19
0
[LLVMdev] [RFC] Add Intel TSX HLE Support
...specify XACQUIRE or XRELEASE hints > This extra target flag is embedded into the SubclassData fields. The following is rationale how such target flags are embedded into SubclassData in SDNode > > here is the current SDNode class hierarchy of memory related nodes > > SDNode -> MemSDNode -> LSBaseNode -> LoadSDNode > | + -> StoreSDNode > + -> AtomicSDNode > + -> MemIntrinsicSDNode > > here is the current SubclassData definitions: > > bit 0~1 : extension type used in LoadSDN...
2010 Sep 22
2
[LLVMdev] r114523 (convert the last 4 X86ISD...) breaks clang
...e code, clang asserts. ---------- round.c -------- #include <math.h> float test() { return llround(1); } -------------------- [MacPro:~/Desktop] jddupas% clang -arch i386 -c round.c Assertion failed: (memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"), function MemSDNode, file /Volumes/MacPro/Projects/OpenSource/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp, line 5393. 0 clang 0x0000000100df5422 PrintStackTrace(void*) + 34 1 clang 0x0000000100df5999 SignalHandler(int) + 841 2 libSystem.B.dylib 0x00007fff8062d35a _sigtramp + 26 3 libSys...
2010 Feb 11
1
[LLVMdev] Metadata [volatile bug?]
...memory > reference info. You just need to make sure that the non-temporal > flag is significant. It's not fundamentally different from the > volatile flag in this respect. Ok, this sounds right, but this look wrong: /// Abstact virtual class for operations for memory operations class MemSDNode : public SDNode { [...] bool isVolatile() const { return (SubclassData >> 5) & 1; } Shouldn't that be MMO->isVolatile()? -Dave
2010 Sep 22
0
[LLVMdev] r114523 (convert the last 4 X86ISD...) breaks clang
...---- round.c -------- > #include <math.h> > float test() { return llround(1); } > -------------------- > > [MacPro:~/Desktop] jddupas% clang -arch i386 -c round.c > Assertion failed: (memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"), function MemSDNode, file /Volumes/MacPro/Projects/OpenSource/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp, line 5393. > 0 clang 0x0000000100df5422 PrintStackTrace(void*) + 34 > 1 clang 0x0000000100df5999 SignalHandler(int) + 841 > 2 libSystem.B.dylib 0x00007fff8062d35a _sigtramp...
2012 Dec 11
4
[LLVMdev] Loads/Stores and MachineMemOperand
I want to get some clarification on the exact semantics of the MachineMemOperand attached to memory-touching instructions. From what I understand, a MemSDNode has an associated MachineMemOperand and a MachineInstr can have zero or more attached MachineMemOperands. But what is the guarantee/constraint placed on optimization/codegen passes for maintaining the contents of a MachineMemOperand? In particular, a MachineMemOperand has a Value associated with...
2010 Feb 12
0
[LLVMdev] Metadata [volatile bug?]
...ust need to make sure that the non-temporal >> flag is significant. It's not fundamentally different from the >> volatile flag in this respect. > > Ok, this sounds right, but this look wrong: > > /// Abstact virtual class for operations for memory operations > class MemSDNode : public SDNode { > [...] > bool isVolatile() const { return (SubclassData >> 5) & 1; } > > Shouldn't that be MMO->isVolatile()? It's not a bug; the code could be written either way. There's actually an assert in MemSDNode's constructor which checks tha...
2009 Aug 03
2
[LLVMdev] RFC: SDNode Flags
On Saturday 01 August 2009 15:12, Dan Gohman wrote: > LoadSDNode, which inherits from MemSDNode is the largest > SDNode. With the current SDNode allocation strategy, making it > bigger will increase the allocation needed for all nodes. Ok. > > new (N) LoadSDNode(..., isVolatile|isNonTemporal); > > > > Thoughts? > > This sounds reasonable. I'd suggest us...
2013 Feb 28
1
[LLVMdev] [RFC] Add Intel TSX HLE Support
...or XRELEASE hints >> This extra target flag is embedded into the SubclassData fields. The following is rationale how such target flags are embedded into SubclassData in SDNode >> >> here is the current SDNode class hierarchy of memory related nodes >> >> SDNode -> MemSDNode -> LSBaseNode -> LoadSDNode >> | + -> StoreSDNode >> + -> AtomicSDNode >> + -> MemIntrinsicSDNode >> >> here is the current SubclassData definitions: >> >> bit 0~1 : extensi...