search for: memory_barri

Displaying 20 results from an estimated 39 matches for "memory_barri".

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2011 Oct 25
3
[LLVMdev] release notes: please mention Intrinsic::memory_barrier removal in 3.0
Hi, Looks like the memory_barrier intrinsic got removed in 3.0 and replaced with fence intrinsics. Could someone who understands this change better than me please update the 3.0 release notes? Also the LangRef still mentions llvm.memory.barrier but this is gone from 3.0. Best regards, --Edwin
2011 Oct 26
0
[LLVMdev] release notes: please mention Intrinsic::memory_barrier removal in 3.0
2011/10/25 Török Edwin <edwintorok at gmail.com>: > Hi, > > Looks like the memory_barrier intrinsic got removed in 3.0 and replaced with fence intrinsics. > Could someone who understands this change better than me please update the 3.0 release notes? > Also the LangRef still mentions llvm.memory.barrier but this is gone from 3.0. r142994 and r142998 for the relevant changes. A...
2011 Oct 26
2
[LLVMdev] release notes: please mention Intrinsic::memory_barrier removal in 3.0
Do these need to go into the 3.0 branch? -bw On Oct 25, 2011, at 5:59 PM, Eli Friedman wrote: > 2011/10/25 Török Edwin <edwintorok at gmail.com>: >> Hi, >> >> Looks like the memory_barrier intrinsic got removed in 3.0 and replaced with fence intrinsics. >> Could someone who understands this change better than me please update the 3.0 release notes? >> Also the LangRef still mentions llvm.memory.barrier but this is gone from 3.0. > > r142994 and r142998 for the re...
2012 Oct 23
4
[LLVMdev] Here need your help
Hi all when i compiled llvm-3.0 with icedtea1.11.4 together,A memory_barrier error happened ,And now I write to all of you for the following questions need your help and suggestion : 1, Is any function which can replace the "make_function" in the following function, 2 , Or is there any different paramters in make_function with the similar action with th...
2011 Oct 26
0
[LLVMdev] release notes: please mention Intrinsic::memory_barrier removal in 3.0
...email about that. r142998 only touches the release notes; it looks like you're hacking on those on trunk. -Eli > On Oct 25, 2011, at 5:59 PM, Eli Friedman wrote: > >> 2011/10/25 Török Edwin <edwintorok at gmail.com>: >>> Hi, >>> >>> Looks like the memory_barrier intrinsic got removed in 3.0 and replaced with fence intrinsics. >>> Could someone who understands this change better than me please update the 3.0 release notes? >>> Also the LangRef still mentions llvm.memory.barrier but this is gone from 3.0. >> >> r142994 and r14...
2016 Jan 10
5
[PATCH v2 0/3] checkpatch: handling of memory barriers
As part of memory barrier cleanup, this patchset extends checkpatch to make it easier to stop incorrect memory barrier usage. This applies on top of my series arch: barrier cleanup + barriers for virt and will be included in the next version of the series. Changes from v2: catch optional\s* before () in barriers rewrite using qr{} instead of map Michael S. Tsirkin (3): checkpatch.pl: add
2016 Jan 10
5
[PATCH v2 0/3] checkpatch: handling of memory barriers
As part of memory barrier cleanup, this patchset extends checkpatch to make it easier to stop incorrect memory barrier usage. This applies on top of my series arch: barrier cleanup + barriers for virt and will be included in the next version of the series. Changes from v2: catch optional\s* before () in barriers rewrite using qr{} instead of map Michael S. Tsirkin (3): checkpatch.pl: add
2020 Jun 30
0
[PATCH 04/18] alpha: Override READ_ONCE() with barriered implementation
...b() on most CPUs, and is never heavier weight than is - * rmb(). - * - * These ordering constraints are respected by both the local CPU - * and the compiler. - * - * Ordering is not guaranteed by anything other than these primitives, - * not even by data dependencies. See the documentation for - * memory_barrier() for examples and URLs to more information. - * - * For example, the following code would force ordering (the initial - * value of "a" is zero, "b" is one, and "p" is "&a"): - * - * <programlisting> - * CPU 0 CPU 1 - * - * b = 2; - * memory_ba...
2016 Jan 04
5
[PATCH 0/3] checkpatch: handling of memory barriers
As part of memory barrier cleanup, this patchset extends checkpatch to make it easier to stop incorrect memory barrier usage. This applies on top of my series arch: barrier cleanup + barriers for virt and will be included in the next version of the series. Michael S. Tsirkin (3): checkpatch.pl: add missing memory barriers checkpatch: check for __smp outside barrier.h checkpatch: add virt
2016 Jan 04
5
[PATCH 0/3] checkpatch: handling of memory barriers
As part of memory barrier cleanup, this patchset extends checkpatch to make it easier to stop incorrect memory barrier usage. This applies on top of my series arch: barrier cleanup + barriers for virt and will be included in the next version of the series. Michael S. Tsirkin (3): checkpatch.pl: add missing memory barriers checkpatch: check for __smp outside barrier.h checkpatch: add virt
2007 Apr 18
1
[RFC] [PATCH] Split host arch headers for UML's benefit
...b() on most CPUs, and is never heavier weight than is + * rmb(). + * + * These ordering constraints are respected by both the local CPU + * and the compiler. + * + * Ordering is not guaranteed by anything other than these primitives, + * not even by data dependencies. See the documentation for + * memory_barrier() for examples and URLs to more information. + * + * For example, the following code would force ordering (the initial + * value of "a" is zero, "b" is one, and "p" is "&a"): + * + * <programlisting> + * CPU 0 CPU 1 + * + * b = 2; + * memory_ba...
2007 Apr 18
1
[RFC] [PATCH] Split host arch headers for UML's benefit
...b() on most CPUs, and is never heavier weight than is + * rmb(). + * + * These ordering constraints are respected by both the local CPU + * and the compiler. + * + * Ordering is not guaranteed by anything other than these primitives, + * not even by data dependencies. See the documentation for + * memory_barrier() for examples and URLs to more information. + * + * For example, the following code would force ordering (the initial + * value of "a" is zero, "b" is one, and "p" is "&a"): + * + * <programlisting> + * CPU 0 CPU 1 + * + * b = 2; + * memory_ba...
2020 Jul 02
0
[PATCH 04/18] alpha: Override READ_ONCE() with barriered implementation
...rce ordering (the initial > > - * value of "a" is zero, "b" is one, and "p" is "&a"): > > - * > > - * <programlisting> > > - * CPU 0 CPU 1 > > - * > > - * b = 2; > > - * memory_barrier(); > > - * p = &b; q = p; > > - * read_barrier_depends(); > > - * d = *q; > > - * </programlisting> > > - * > > - * because the read of "*q"...
2016 Jan 10
3
[PATCH v2 1/3] checkpatch.pl: add missing memory barriers
...ldn't have a capture group. my $all_barriers = qr{ $barriers| $smp_barriers }x; > + > + if ($line =~ /\b($all_barriers)\s*\(/) { This doesn't need the capture group either (?:all_barriers) > ? if (!ctx_has_comment($first_line, $linenr)) > { > ? WARN("MEMORY_BARRIER", > ? ?????"memory barrier without > comment\n" . $herecurr);
2016 Jan 10
3
[PATCH v2 1/3] checkpatch.pl: add missing memory barriers
...ldn't have a capture group. my $all_barriers = qr{ $barriers| $smp_barriers }x; > + > + if ($line =~ /\b($all_barriers)\s*\(/) { This doesn't need the capture group either (?:all_barriers) > ? if (!ctx_has_comment($first_line, $linenr)) > { > ? WARN("MEMORY_BARRIER", > ? ?????"memory barrier without > comment\n" . $herecurr);
2016 Jan 10
4
[PATCH v3 0/3] checkpatch: handling of memory barriers
As part of memory barrier cleanup, this patchset extends checkpatch to make it easier to stop incorrect memory barrier usage. This replaces the checkpatch patches in my series arch: barrier cleanup + barriers for virt and will be included in the next version of the series. changes from v2: address comments by Joe Perches: use (?: ... ) to avoid unnecessary capture groups rename smp_barriers
2016 Jan 10
4
[PATCH v3 0/3] checkpatch: handling of memory barriers
As part of memory barrier cleanup, this patchset extends checkpatch to make it easier to stop incorrect memory barrier usage. This replaces the checkpatch patches in my series arch: barrier cleanup + barriers for virt and will be included in the next version of the series. changes from v2: address comments by Joe Perches: use (?: ... ) to avoid unnecessary capture groups rename smp_barriers
2014 Apr 30
1
[PATCH 1/2] nouveau: remove cb_dirty, it's never used
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> --- src/gallium/drivers/nouveau/nouveau_buffer.c | 4 +--- src/gallium/drivers/nouveau/nouveau_context.h | 1 - 2 files changed, 1 insertion(+), 4 deletions(-) diff --git a/src/gallium/drivers/nouveau/nouveau_buffer.c b/src/gallium/drivers/nouveau/nouveau_buffer.c index e308ff4..904e2cc 100644 ---
2016 Jan 04
4
[PATCH 1/3] checkpatch.pl: add missing memory barriers
...)); > + > + if ($line =~ /\b($all_barriers)\(/) { It would be better to use /\b$all_barriers\s*\(/ as there's no reason for the capture and there could be a space between the function and the open parenthesis. > ? if (!ctx_has_comment($first_line, $linenr)) { > ? WARN("MEMORY_BARRIER", > ? ?????"memory barrier without comment\n" . $herecurr);
2016 Jan 04
4
[PATCH 1/3] checkpatch.pl: add missing memory barriers
...)); > + > + if ($line =~ /\b($all_barriers)\(/) { It would be better to use /\b$all_barriers\s*\(/ as there's no reason for the capture and there could be a space between the function and the open parenthesis. > ? if (!ctx_has_comment($first_line, $linenr)) { > ? WARN("MEMORY_BARRIER", > ? ?????"memory barrier without comment\n" . $herecurr);