search for: mce

Displaying 20 results from an estimated 888 matches for "mce".

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2008 Feb 04
0
[LLVMdev] Exception handling in JIT
...: > static char ID; > @@ -82,6 +88,8 @@ > assert((MF.getTarget().getRelocationModel() != Reloc::Default || > MF.getTarget().getRelocationModel() != Reloc::Static) && > "JIT relocation model must be set to static or default!"); > + > + MCE.setModuleInfo(&getAnalysis<MachineModuleInfo>()); > do { > MovePCtoLROffset = 0; > MCE.startFunction(MF); > @@ -101,6 +109,9 @@ > default: > MCE.emitWordBE(getBinaryCodeForInstr(*I)); > break; > + case TargetInstrInfo::LABEL: > +...
2008 Feb 01
2
[LLVMdev] Exception handling in JIT
Dear all, Here's a new patch with Evan's comments (thx Evan!) and some cleanups. Now the (duplicated) exception handling code is in a new file: lib/ExecutionEngine/JIT/JITDwarfEmitter. This patch should work on linux/x86 and linux/ppc (tested). Nicolas -------------- next part -------------- An embedded and charset-unspecified text was scrubbed... Name: jit-exceptions.patch URL:
2012 Sep 18
6
[PATCH 2/5] Xen/MCE: vMCE injection
Xen/MCE: vMCE injection In our test for win8 guest mce, we find a bug that no matter what SRAO/SRAR error xen inject to win8 guest, it always reboot. The root cause is, current Xen vMCE logic inject vMCE# only to vcpu0, this is not correct for Intel MCE (Under Intel arch, h/w generate MCE# to all CPUs)....
2011 Jul 22
0
[PATCH] Dump mce log by ERST when mc panic
Dump mce log by ERST when mc panic We have implemented basic ERST logic before. Now linux3.0 as dom0 has included APEI logic. Hence it''s time to add mce apei interface and enable APEI ERST feature. With it, it can save mce log by ERST method when mc panic. Signed-off-by: Liu, Jinsong <jinsong....
2012 Jul 05
3
[PATCH] Xen/MCE: stick all 1's to MCi_CTL of vMCE
Jan, This patch just used to stick all 1''s to MCi_CTL, it should not involve much argue, so I sent it separately. Thanks, Jinsong ==================== Xen/MCE: stick all 1''s to MCi_CTL of vMCE This patch is a middle-work patch, prepare for future new vMCE model. It remove mci_ctl array, and keep MCi_CTL all 1''s. Signed-off-by: Liu, Jinsong <jinsong.liu@intel.com> diff -r 4f92bdf3370c xen/arch/x86/cpu/mcheck/vmce.c --- a/xen/arc...
2012 Dec 04
2
Audit of NMI and MCE paths
...first leg of the call graph, I have found several ASSERT()s, a BUG() and many {rd,wr}msr()s. Given that these are common code, and sensible in their places, removing them for the sake of being on the NMI path seems silly. As an alternative, I suggest that we make ASSERT()s, BUG()s and WARN()s NMI/MCE safe, from a printk spinlock point of view. Either we can modify the macros to do a console_force_unlock(), which is fine for BUG() and ASSERT(), but problematic for WARN() (and deferring the printing to a tasklet wont work if we want a stack trace). Alternativly, we could change the console lock...
2012 Dec 05
1
Recursive locking in Xen (in reference to NMI/MCE path audit)
Hello, While auditing the NMI/MCE paths, I have encountered some issues with recursive locking in Xen, discovered by the misuse of the console_lock intermittently as a regular lock and as a recursive lock. The comment in spinlock.h is unclear as to whether mixing recursive and non recursive calls on the same spinlock is valid. If...
2013 Mar 14
1
[PATCH v2 0/2] AMD MCE fixes
Boris, Here is the updated patch for determining number of regiter banks on AMD plus a patch removing shared_bank array, as you suggested. Offline/online testing didn''t show any issues. Boris Ostrovsky (2): x86/mce: Replace shared_bank array with is_shared_bank() helper x86/mce: Use MCG_CAP MSR to find out number of banks on AMD arch/x86/kernel/cpu/mcheck/mce_amd.c | 38 ++++++++++++++++++++++-------------- 1 file changed, 23 insertions(+), 15 deletions(-) -- 1.8.1.2
2005 Oct 24
2
[LLVMdev] [patch] Fix problems with build LLVM using gcc 4.1.0 (gcc CVS mainline)
...n.h" #include "llvm/Support/Debug.h" #include "llvm/ADT/Statistic.h" -using namespace llvm; + +namespace llvm { namespace { Statistic<> @@ -72,7 +73,7 @@ /// createAlphaCodeEmitterPass - Return a pass that emits the collected Alpha code /// to the specified MCE object. -FunctionPass *llvm::createAlphaCodeEmitterPass(MachineCodeEmitter &MCE) { +FunctionPass *createAlphaCodeEmitterPass(MachineCodeEmitter &MCE) { return new AlphaCodeEmitter(MCE); } @@ -234,6 +235,7 @@ return rv; } +} // end llvm namespace #include "AlphaGenCodeEmitte...
2011 Mar 21
1
Cant find out MCE reason (CPU 35 BANK 8)
Hello community. We are running, Centos 4.8 on SuperMicro SYS-6026T-3RF with 2xIntel Xeon E5630 and 8xKingston KVR1333D3D4R9S/4G For some time we have lots of MCE in mcelog and we cant find out the reason. "Ordinary" mce message looks like: CPU 51 BANK 8 TSC 8511e3ca77dc MISC 274d587f00006141 ADDR 807044840 STATUS cc0055000001009f MCGSTATUS 0 decode with mcelog --ascii --cpu p4(cause there is no xeon56xx in list): HARDWARE ERROR. This is *NOT* a...
2012 Jan 27
4
[PATCH] Tools: build tests
...H),$(XEN_TARGET_ARCH)) diff -r 2c6ff08e8b5b -r 7d62108a8936 tools/tests/Makefile --- /dev/null +++ b/tools/tests/Makefile @@ -0,0 +1,20 @@ +XEN_ROOT = $(CURDIR)/../.. +include $(XEN_ROOT)/tools/Rules.mk + +CFLAGS += $(CFLAGS_libxenctrl) +LDLIBS += $(LDLIBS_libxenctrl) + +SUBDIRS-y := +SUBDIRS-y += mce-test +SUBDIRS-y += mem-sharing +ifeq ($(XEN_TARGET_ARCH),__fixme__) +SUBDIRS-y += regression +endif +SUBDIRS-y += x86_emulator +ifneq ($(XEN_TARGET_ARCH),x86_32) +SUBDIRS-y += xen-access +endif + +.PHONY: all clean install +all clean install: %: subdirs-% +
2010 Jan 29
2
support for hvm
...el s3200 motherboard. BIOS has enabled intel virtualisation. centos 5.4, 64bit [root@localhost ~]# uname -a Linux localhost.localdomain 2.6.18-164.el5xen #1 SMP Thu Sep 3 04:03:03 EDT 2009 x86_64 x86_64 x86_64 GNU/Linux [root@localhost ~]# grep vmx /proc/cpuinfo flags           : fpu tsc msr pae mce cx8 apic mtrr mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm syscall nx lm constant_tsc pni monitor ds_cpl vmx smx est tm2 cx16 xtpr lahf_lm flags           : fpu tsc msr pae mce cx8 apic mtrr mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm syscall nx lm constant_tsc...
2011 Apr 06
0
[PATCH] X86: Fix mce offline page bug
X86: Fix mce offline page bug c/s 19913 break mce offline page logic: For page_state_is(pg, free), it''s impossible to trigger the case; For page_state_is(pg, offlined), it in fact didn''t offline related page; This patch fix the bug, and remove an ambiguous comment. Signed-off-by: Liu, Jinso...
2012 Nov 13
1
mce error
During booting of Centos6 I see an error message that goes something like: Starting mcelog daemon [FAILED] AMD Processor family 15: Please load edac_mce_amd module. CPU is unsupported The only helpful information I have found is in the "preview" of https://access.redhat.com/knowledge/solutions/158503. I don't have a RedHat account,...
2006 Aug 28
1
windows XP media center 2005
...to find out how. does anybody know which registry patch you need? kind regards werner <quote>When Microsoft released Windows XP Media Center Edition 2005, the ability to join domains was left out. The domain feature was eliminated because of pricing reasons as well as technical reasons. MCE 2005 relies on fast user switching to allow it's extender devices to connect to the central MCE workstation. If the MCE workstation is on a domain, fast user switching will not work, and any extender devices will not work. If you do not use any extender devices, such as the set top boxes t...
2005 Oct 24
0
[LLVMdev] [patch] Fix problems with build LLVM using gcc 4.1.0 (gcc CVS mainline)
...ision 1.6 diff -u -r1.6 AlphaCodeEmitter.cpp --- AlphaCodeEmitter.cpp 4 Aug 2005 15:32:36 -0000 1.6 +++ AlphaCodeEmitter.cpp 24 Oct 2005 04:57:10 -0000 @@ -72,9 +72,11 @@ /// createAlphaCodeEmitterPass - Return a pass that emits the collected Alpha code /// to the specified MCE object. -FunctionPass *llvm::createAlphaCodeEmitterPass(MachineCodeEmitter &MCE) { +namespace llvm { +FunctionPass *createAlphaCodeEmitterPass(MachineCodeEmitter &MCE) { return new AlphaCodeEmitter(MCE); } +} bool AlphaCodeEmitter::runOnMachineFunction(MachineFunction &MF) {...
2007 May 29
24
RFC: MCA/MCE concept
Hello! The current MCA/MCE support in Xen is that it dumps the error and panics. In the following concept I propose here, there are two places where Xen has to react on. I) Xen receives a MCE from the CPU and II) Xen receives Dom0 instructions via Hypercall The term "self-healing" below is used in the sense of u...
2010 Dec 12
2
CMCI exceptions happened and MCE entry state transition made Xen crashed.
Hi all, Three days ago, the server reported lots of CMCI exceptions and Xen 3.4.2 printed hundreds of "CMCI: send CMCI to DOM0 through virq" messages to the console . From the console output, Then I can see that Dom0 try to read the MSR_CAP regs by #GP trap in order to log the MCA error. I am not sure why so many CMCI happened , maybe there were some thing wrong with the hardware.
2010 Dec 12
2
CMCI exceptions happened and MCE entry state transition made Xen crashed.
Hi all, Three days ago, the server reported lots of CMCI exceptions and Xen 3.4.2 printed hundreds of "CMCI: send CMCI to DOM0 through virq" messages to the console . From the console output, Then I can see that Dom0 try to read the MSR_CAP regs by #GP trap in order to log the MCA error. I am not sure why so many CMCI happened , maybe there were some thing wrong with the hardware.
2010 Mar 23
0
[PATCH] x86: s3: ensure CR4.MCE is enabled after mcheck_init()
Changeset 21045: 7751288b1386 introduces a potential issue: CR4.MCE is enabled before mcheck_init() -- thought looks I don''t meet with an actual issue with this, we''d better fix it. Thanks, -- Dexuan _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel