search for: max_ac_packet

...wr; + struct nv50_disp_sor_hdmi_pwr_v0_infoframe iframe[3]; } args = { .base.version = 1, .base.method = NV50_DISP_MTHD_V1_SOR_HDMI_PWR, @@ -2792,17 +2817,39 @@ nv50_hdmi_enable(struct drm_encoder *encoder, struct drm_display_mode *mode) }; struct nouveau_connector *nv_connector; u32 max_ac_packet; + union hdmi_infoframe avi_frame; + union hdmi_infoframe vendor_frame; + int ret; + int size; + int frame = 0; nv_connector = nouveau_encoder_connector_get(nv_encoder); if (!drm_detect_hdmi_monitor(nv_connector->edid)) return; + /* Audio InfoFrame apparently not required (supplied by...

This is the beginnings of HDMI 2.0 support. All of the "extra" features are left out, such as 12/16bpc, YUV420, etc. I've verified that with this code, a GP108 (GT1030) can switch between 4k at 60 and 1920x1080 at 60 on a LG 4K TV. Further, I've verified via i2c tools, that the SCDC writes really do happen. I suspect that the patch for keeping track of the high-speed TMDS

This is an initial implementation of HDMI 3D mode support for the nouveau kernel driver. It works on all of the hardware that I have available to test at the moment, but I am unsure as to the overall approach taken for setting HDMI InfoFrames, there's no support for g84 or gf119 disps, and the criteria for enabling stereo support for an output seems a bit iffy. The first four patches arrange

...rs/gpu/drm/nouveau/include/nvif/cl5070.h b/drivers/gpu/drm/nouveau/include/nvif/cl5070.h index ae49dfd..a3ce3bf 100644 --- a/drivers/gpu/drm/nouveau/include/nvif/cl5070.h +++ b/drivers/gpu/drm/nouveau/include/nvif/cl5070.h @@ -76,7 +76,21 @@ struct nv50_disp_sor_hdmi_pwr_v0 { __u8 state; __u8 max_ac_packet; __u8 rekey; - __u8 pad04[4]; + __u8 flags; +#define NV50_DISP_MTHD_V1_SOR_HDMI_PWR_FLAG_AUDIO_INFOFRAME 0x01 +#define NV50_DISP_MTHD_V1_SOR_HDMI_PWR_FLAG_AVI_INFOFRAME 0x02 +#define NV50_DISP_MTHD_V1_SOR_HDMI_PWR_FLAG_VENDOR_INFOFRAME 0x04 + __u8 pad05[3]; +}; + +struct nv50_dis...

...e.display_info.hdmi; > union hdmi_infoframe infoframe = { 0 }; > const u8 rekey = 56; /* binary driver, and tegra, constant */ > + DEFINE_RAW_FLEX(struct nvif_outp_infoframe_v0, args, data, 17); > + const u8 data_len = 17; /* same length as in DEFINE_RAW_FLEX above. */ > u32 max_ac_packet; > - struct { > - struct nvif_outp_infoframe_v0 infoframe; > - u8 data[17]; > - } args = { 0 }; > int ret, size; > > max_ac_packet = mode->htotal - mode->hdisplay; > @@ -815,29 +813,29 @@ nv50_hdmi_enable(struct drm_encoder *encoder, struct nouveau_crtc *nv...

...= &nv_connector->base.display_info.hdmi; union hdmi_infoframe infoframe = { 0 }; const u8 rekey = 56; /* binary driver, and tegra, constant */ + DEFINE_RAW_FLEX(struct nvif_outp_infoframe_v0, args, data, 17); + const u8 data_len = 17; /* same length as in DEFINE_RAW_FLEX above. */ u32 max_ac_packet; - struct { - struct nvif_outp_infoframe_v0 infoframe; - u8 data[17]; - } args = { 0 }; int ret, size; max_ac_packet = mode->htotal - mode->hdisplay; @@ -815,29 +813,29 @@ nv50_hdmi_enable(struct drm_encoder *encoder, struct nouveau_crtc *nv_crtc, return; /* AVI InfoFrame. */...

...UTP_H__ #include <nvif/object.h> #include <nvif/if0012.h> +#include <drm/display/drm_dp.h> struct nvif_disp; struct nvif_outp { @@ -21,7 +22,7 @@ int nvif_outp_acquire_rgb_crt(struct nvif_outp *); int nvif_outp_acquire_tmds(struct nvif_outp *, int head, bool hdmi, u8 max_ac_packet, u8 rekey, u8 scdc, bool hda); int nvif_outp_acquire_lvds(struct nvif_outp *, bool dual, bool bpc8); -int nvif_outp_acquire_dp(struct nvif_outp *, u8 dpcd[16], +int nvif_outp_acquire_dp(struct nvif_outp *outp, u8 dpcd[DP_RECEIVER_CAP_SIZE], int link_nr, int link_bw, bool hda, bool mst); void...

...; > > +#include <drm/display/drm_dp.h> > > struct nvif_disp; > > > > struct nvif_outp { > > @@ -21,7 +22,7 @@ int nvif_outp_acquire_rgb_crt(struct nvif_outp *); > > int nvif_outp_acquire_tmds(struct nvif_outp *, int head, > > bool hdmi, u8 max_ac_packet, u8 rekey, u8 scdc, bool hda); > > int nvif_outp_acquire_lvds(struct nvif_outp *, bool dual, bool bpc8); > > -int nvif_outp_acquire_dp(struct nvif_outp *, u8 dpcd[16], > > +int nvif_outp_acquire_dp(struct nvif_outp *outp, u8 dpcd[DP_RECEIVER_CAP_SIZE], > > int link_nr,...

...ct { struct nv50_disp_mthd_v1 base; @@ -798,7 +813,6 @@ nv50_hdmi_enable(struct drm_encoder *encoder, struct drm_atomic_state *state, .pwr.state = 1, .pwr.rekey = 56, /* binary driver, and tegra, constant */ }; - struct nouveau_connector *nv_connector; struct drm_hdmi_info *hdmi; u32 max_ac_packet; union hdmi_infoframe avi_frame; @@ -808,7 +822,6 @@ nv50_hdmi_enable(struct drm_encoder *encoder, struct drm_atomic_state *state, int ret; int size; - nv_connector = nv50_outp_get_new_connector(state, nv_encoder); if (!drm_detect_hdmi_monitor(nv_connector->edid)) return; @@ -854,...

Dropping Tegra ML, it's not the place where Nouveau mails should go. Adding Nouveau ML and Maarten, who probably knows Lockdep+Nouveau best. Am Montag, den 04.03.2013, 22:16 +0100 schrieb Borislav Petkov: > New -rc1, so let the stabilization games begin. > > I see the following on rc1, let me know if you need more info. > > > [ 0.633617]

...ouveau/dispnv50/disp.c b/drivers/gpu/drm/nouveau/dispnv50/disp.c index 26af45785939..bc06aa79363f 100644 --- a/drivers/gpu/drm/nouveau/dispnv50/disp.c +++ b/drivers/gpu/drm/nouveau/dispnv50/disp.c @@ -561,7 +561,7 @@ nv50_hdmi_enable(struct drm_encoder *encoder, struct drm_display_mode *mode) u32 max_ac_packet; union hdmi_infoframe avi_frame; union hdmi_infoframe vendor_frame; - bool scdc_supported, high_tmds_clock_ratio = false, scrambling = false; + bool high_tmds_clock_ratio = false, scrambling = false; u8 config; int ret; int size; @@ -571,10 +571,9 @@ nv50_hdmi_enable(struct drm_encoder *e...

...drivers/gpu/drm/nouveau/dispnv50/disp.c > index 6cbbae3f438b..d8e512c83211 100644 > --- a/drivers/gpu/drm/nouveau/dispnv50/disp.c > +++ b/drivers/gpu/drm/nouveau/dispnv50/disp.c > @@ -554,7 +554,7 @@ nv50_hdmi_enable(struct drm_encoder *encoder, struct drm_display_mode *mode) > u32 max_ac_packet; > union hdmi_infoframe avi_frame; > union hdmi_infoframe vendor_frame; > - bool scdc_supported, high_tmds_clock_ratio = false, scrambling = false; > + bool high_tmds_clock_ratio = false, scrambling = false; > u8 config; > int ret; > int size; > @@ -564,10 +564,9 @...

...ouveau/dispnv50/disp.c b/drivers/gpu/drm/nouveau/dispnv50/disp.c index 6cbbae3f438b..d8e512c83211 100644 --- a/drivers/gpu/drm/nouveau/dispnv50/disp.c +++ b/drivers/gpu/drm/nouveau/dispnv50/disp.c @@ -554,7 +554,7 @@ nv50_hdmi_enable(struct drm_encoder *encoder, struct drm_display_mode *mode) u32 max_ac_packet; union hdmi_infoframe avi_frame; union hdmi_infoframe vendor_frame; - bool scdc_supported, high_tmds_clock_ratio = false, scrambling = false; + bool high_tmds_clock_ratio = false, scrambling = false; u8 config; int ret; int size; @@ -564,10 +564,9 @@ nv50_hdmi_enable(struct drm_encoder *e...