search for: mast

Displaying 20 results from an estimated 161 matches for "mast".

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2012 Jan 20
1
Asterisk NOT in the media path
Hello, I want to place an Asterisk-server A in front of 2 other Asterisk-servers (B1 & B2). This first Asterisk-server A needs to send incoming calls to one of the 2 available Asterisk-servers (B1 or B2) behind it. So I want the first Asterisk-server A to accept the call, and based upon some checks in the dialplan send the call through to one of the other Asterisk-servers (B1 or B2)
2014 Oct 30
2
[PATCH] nv50/disp: Fix modeset on G94
...d1..2f24a08 100644 --- a/drivers/gpu/drm/nouveau/nv50_display.c +++ b/drivers/gpu/drm/nouveau/nv50_display.c @@ -791,6 +791,23 @@ nv50_crtc_set_scale(struct nouveau_crtc *nv_crtc, bool update) } static int +nv50_crtc_set_raster_vblank_dmi(struct nouveau_crtc *nv_crtc, u32 usec) +{ + struct nv50_mast *mast = nv50_mast(nv_crtc->base.dev); + u32 *push; + + push = evo_wait(mast, 8); + if (!push) + return -ENOMEM; + + evo_mthd(push, 0x0828 + (nv_crtc->index * 0x400), 1); + evo_data(push, usec); + evo_kick(push, mast); + + return 0; +} + +static int nv50_crtc_set_color_vibrance(struct nouvea...
2013 Nov 16
0
[PATCH] drm/nouveau/clk: Implement reclocking for NVAA/NVAC
...gt; 8; + M1 = (coef & 0x000000ff); + if ((ctrl & 0x80000000) && M1) { + clock = ref * N1 / M1; + clock = clock / post_div; + } + + return clock; +} + +static int +nvaa_clock_read(struct nouveau_clock *clk, enum nv_clk_src src) +{ + struct nvaa_clock_priv *priv = (void *)clk; + u32 mast = nv_rd32(clk, 0x00c054); + u32 P = 0; + + switch (src) { + case nv_clk_src_crystal: + return nv_device(priv)->crystal; + case nv_clk_src_href: + return 100000; /* PCIE reference clock */ + case nv_clk_src_hclkm4: + return clk->read(clk, nv_clk_src_href) * 4; + case nv_clk_src_hclkm2d3: +...
2013 Nov 17
0
[PATCH] drm/nouveau/clk: Implement reclocking for NVAA/NVAC
...gt; 8; + M1 = (coef & 0x000000ff); + if ((ctrl & 0x80000000) && M1) { + clock = ref * N1 / M1; + clock = clock / post_div; + } + + return clock; +} + +static int +nvaa_clock_read(struct nouveau_clock *clk, enum nv_clk_src src) +{ + struct nvaa_clock_priv *priv = (void *)clk; + u32 mast = nv_rd32(clk, 0x00c054); + u32 P = 0; + + switch (src) { + case nv_clk_src_crystal: + return nv_device(priv)->crystal; + case nv_clk_src_href: + return 100000; /* PCIE reference clock */ + case nv_clk_src_hclkm4: + return clk->read(clk, nv_clk_src_href) * 4; + case nv_clk_src_hclkm2d3: +...
2014 Oct 30
2
[PATCH] nv50/disp: Fix modeset on G94
...tic int >> +nv50_crtc_set_raster_vblank_dmi(struct nouveau_crtc *nv_crtc, u32 usec) > > What's "dmi"? SetRasterVertBlankDmi is the name of method 0x828. I presume it's Display Memory Interface or something to that effect. > >> +{ >> + struct nv50_mast *mast = nv50_mast(nv_crtc->base.dev); >> + u32 *push; >> + >> + push = evo_wait(mast, 8); > > Just needs to be 2, no? Yes, doesn't matter too much though. > >> + if (!push) >> + return -ENOMEM; >> + >> +...
2013 Nov 09
2
[PATCH] drm/nouveau/clk: Initial implementation for reclocking NVAA/NVAC
Reclocking of NVAA/NVAC is substantially different from NV50+, enough to justify a separate clock implementation. This code is a forward-port of reclocking code that has been sitting in a branch for a while, and has been tested on my NVAC. Traces show no significant reasons why this shouldn't work on NVAA, but testers are always welcome. And since these are IGPs without dedicated RAM to
2015 Jan 05
2
drm/nouveau: dont switch vt on suspend
Signed-off-by: Maarten Lankhorst <maarten.lankhorst at ubuntu.com> --- diff --git a/drivers/gpu/drm/nouveau/nouveau_fbcon.c b/drivers/gpu/drm/nouveau/nouveau_fbcon.c index 3ed12a8cfc91..a4a586807903 100644 --- a/drivers/gpu/drm/nouveau/nouveau_fbcon.c +++ b/drivers/gpu/drm/nouveau/nouveau_fbcon.c @@ -370,6 +370,7 @@ nouveau_fbcon_create(struct drm_fb_helper *helper, ret = -ENOMEM; goto
2013 May 09
0
FreeBSD Foundation Announces Ed Maste as Director of Project Development
The FreeBSD Foundation is pleased to announce Ed Maste's new role as the Foundation's part-time Director of Project Development. Ed has served on the Foundation's board for two years, and has stepped down in order to accept this new position. In this position Ed will manage the Foundation's sponsored work, including projects funded u...
2018 Jul 26
2
Level of support for ARM LLD
On 26 July 2018 at 15:52, Ed Maste <emaste at freebsd.org> wrote: > On 27 February 2018 at 09:06, Ed Maste <emaste at freebsd.org> wrote: >> >> A number of companies are shipping products based on FreeBSD/arm, on >> v5 and up. As far as I know those using older processors are also >> using old...
2023 Aug 02
1
[PATCH] ssh_config: reflect default CheckHostIP no
Checking up on this change: On Wed, 29 Mar 2023 at 19:38, Ed Maste <emaste at freefall.freebsd.org> wrote: > > From: Ed Maste <emaste at FreeBSD.org> > > By convention settings in ssh_config are shown with a commented out > default. > > Fixes: 6cb52d5bf771 ("upstream: make CheckHostIP default to 'no'...") > --...
2014 Oct 30
0
[PATCH] nv50/disp: Fix modeset on G94
.../drivers/gpu/drm/nouveau/nv50_display.c > @@ -791,6 +791,23 @@ nv50_crtc_set_scale(struct nouveau_crtc *nv_crtc, bool update) > } > > static int > +nv50_crtc_set_raster_vblank_dmi(struct nouveau_crtc *nv_crtc, u32 usec) What's "dmi"? > +{ > + struct nv50_mast *mast = nv50_mast(nv_crtc->base.dev); > + u32 *push; > + > + push = evo_wait(mast, 8); Just needs to be 2, no? > + if (!push) > + return -ENOMEM; > + > + evo_mthd(push, 0x0828 + (nv_crtc->index * 0x400), 1); > + evo_data(pu...
2014 Oct 31
0
[PATCH] nv50/disp: Fix modeset on G94
..._dmi(struct nouveau_crtc *nv_crtc, u32 > usec) > > > > What's "dmi"? > SetRasterVertBlankDmi is the name of method 0x828. I presume it's > Display Memory Interface or something to that effect. > > > > >> +{ > >> + struct nv50_mast *mast = nv50_mast(nv_crtc->base.dev); > > >> + u32 *push; > >> + > >> + push = evo_wait(mast, 8); > > > > Just needs to be 2, no? > Yes, doesn't matter too much though. If it is, we might need to fix nv50_crtc_mode_set() too; it seems...
2018 Dec 27
3
recording session
Hi, Please if you know any opensource tools he can recording session ? Freeipa can do this ? Thank's -- *Ilyass kaouam* *Ing?nieur System OpenSource* *Mast?re europ?en Manager de Projets Informatiques*
2014 Aug 23
2
RESEND NVA3 clock tree improvements
Resend of patch #7 to fix behaviour when failing to pause parts of the GPU
2018 Jul 26
3
Level of support for ARM LLD
On 26 July 2018 at 18:05, Ed Maste <emaste at freebsd.org> wrote: > On 26 July 2018 at 11:08, Peter Smith <peter.smith at linaro.org> wrote: >> On 26 July 2018 at 15:52, Ed Maste <emaste at freebsd.org> wrote: >>> On 27 February 2018 at 09:06, Ed Maste <emaste at freebsd.org> wrote: >&gt...
2014 Aug 29
1
RESENT NVA3 clock tree improvements
Re-resend of patch #7 to move the _post and _pre function prototypes to nva3.h
2014 Aug 23
0
[PATCH] clock/nva3: Pause the GPU before reclocking
.../drivers/gpu/drm/nouveau/core/subdev/clock/nvaa.c +++ b/drivers/gpu/drm/nouveau/core/subdev/clock/nvaa.c @@ -299,25 +299,14 @@ static int nvaa_clock_prog(struct nouveau_clock *clk) { struct nvaa_clock_priv *priv = (void *)clk; - struct nouveau_fifo *pfifo = nouveau_fifo(clk); + u32 pllmask = 0, mast; unsigned long flags; - u32 pllmask = 0, mast, ptherm_gate; - int ret = -EBUSY; - - /* halt and idle execution engines */ - ptherm_gate = nv_mask(clk, 0x020060, 0x00070000, 0x00000000); - nv_mask(clk, 0x002504, 0x00000001, 0x00000001); - /* Wait until the interrupt handler is finished */ - if (!n...
2018 Mar 13
1
retpoline mitigation and 6.0
On 13 March 2018 at 16:51, Ed Maste <emaste at freebsd.org> wrote: > On 7 February 2018 at 01:20, Chandler Carruth via llvm-dev > <llvm-dev at lists.llvm.org> wrote: >> I've landed the patch in r324449. > > To confirm, this change *did not* make it into 6.0.0, correct? I'm > looking at adding...
2014 Oct 28
0
[PATCH] nv50/disp: Fix modeset on G94
...; @@ -1141,6 +1141,17 @@ nv50_crtc_mode_set(struct drm_crtc *crtc, struct drm_display_mode *umode, nv_connector = nouveau_crtc_connector_get(nv_crtc); nv50_crtc_set_dither(nv_crtc, false); nv50_crtc_set_scale(nv_crtc, false); + + /* G94 only accepts this after setting scale */ + if (nv50_vers(mast) < GF110_DISP_CORE_CHANNEL_DMA) { + push = evo_wait(mast, 8); + if (push) { + evo_mthd(push, 0x0828 + (nv_crtc->index * 0x400), 1); + evo_data(push, vblankus); + evo_kick(push, mast); + } + } + nv50_crtc_set_color_vibrance(nv_crtc, false); nv50_crtc_set_image(nv_crtc, crtc->pr...
2014 Sep 05
1
[PATCH 1/8] nv50/display: Set VBLANK time in modeset script
...amp; DRM_MODE_FLAG_INTERLACE) { > vblan2e = vactive + vsynce + vbackp; > vblan2s = vblan2e + (mode->vdisplay * vscan / ilace); > @@ -1100,17 +1101,22 @@ nv50_crtc_mode_set(struct drm_crtc *crtc, struct drm_display_mode *umode, > push = evo_wait(mast, 64); > if (push) { > if (nv50_vers(mast) < NVD0_DISP_MAST_CLASS) { > + /* XXX: Safe underestimate, even "0" works */ > + vblankus = (vactive - mode->vdisplay - 2) * hactive; > +...