search for: maske

Displaying 20 results from an estimated 14745 matches for "maske".

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2018 Apr 10
1
64 bit mask in x86vshuffle instruction
Please tell me whether the following implementation is correct..... My target supports 64 bit mask means immediate(0-2^63) I have implemented it but i dont know whether its correct or not. Please see the changes below that i have made in x86isellowering.cpp static SDValue lower2048BitVectorShuffle(const SDLoc &DL, ArrayRef<int> Mask, MVT VT,
2009 Dec 01
5
Normal tests disagree?
If I have data that I feed into shapio.test and jarque.bera.test yet they seem to disagree. What do I use for a decision? For my data set I have p.value of 0.05496421 returned from the shapiro.test and 0.882027 returned from the jarque.bera.test. I have included the data set below. Thank you. Kevin "Category","Period","Residual" "CHILD HATS, WIGS &
2007 Nov 20
0
7 commits - libswfdec/swfdec_movie.c libswfdec/swfdec_sprite_movie_as.c test/image
...mask-clip-mask-6.swf.png |binary test/image/mask-clip-mask-7.swf |binary test/image/mask-clip-mask-7.swf.png |binary test/image/mask-clip-mask-8.swf |binary test/image/mask-clip-mask-8.swf.png |binary test/image/mask-clip-maskee-5.swf |binary test/image/mask-clip-maskee-5.swf.png |binary test/image/mask-clip-maskee-6.swf |binary test/image/mask-clip-maskee-6.swf.png |binary test/image/mask-clip-maskee-7.swf |binary test/image/mask-clip-maskee-7.swf.pn...
1999 Dec 13
0
Logon scripts w/samba
I have a logon script for windows clients to preform net time w/my samba server when they logon. The script is called gerry.bat and it is located in the logon directory. But, when any user logs on.... The script is never called. I've attached my smb.conf file. (by the way Im running RH6.0 on an AMD K-7 w/Samba 2.0.5a. THANKS IN ADVANCE!!!! # Samba config file created using SWAT # from
2016 Apr 18
2
lists and rownames
...the resulting columns have names derived from the original filenames. Example code is below. My question is, where are these names stored in the list? Are there methods that can access this from the list? Is there a way to preserve them verbatim? Thanks -Ed > example.names [1] "con1-1-masked-bottom-green.tsv" "con1-1-masked-bottom-red.tsv" [3] "con1-1-masked-top-green.tsv" "con1-1-masked-top-red.tsv" > example.list <- strsplit(example.names, "-") > example.list [[1]] [1] "con1" "1" "masked&q...
2020 Nov 06
2
Loop-vectorizer prototype for the EPI Project based on the RISC-V Vector Extension (Scalable vectors)
On 11/6/20 12:39 PM, Sjoerd Meijer wrote: Hello Simon, Thanks for your replies, very useful. And yes, thanks for the example and making the target differences clear: ; Some examples: ; RISC-V V & VE(*): ; %mask = (splat i1 1) ; %evl = min(256, %n - %i) ; MVE/SVE : ; %mask = get.active.lane.mask(%i, %n) ; %evl = call @llvm.vscale() ; AVX: ; %mask = icmp (%i + (seq
2020 May 24
0
Clients send tons of Notiftication requests
I am still fighting with this issue. I did the following: I connected to the NAS with a read-only account called kodi. I traversed various folders and I finally opened an image. Everything went fine. Looking at the logs, the get_entry mask file only shows the final folder: smbd_dirptr_get_entry mask=[Anhelina Viber] found Users/luca/Pictures/Canon/Alessandro/Amici/Anhelina Viber fname=Anhelina
2007 Sep 18
1
I''m having an issue with u32 masking
...ow, to further verify that these bit masks do indeed work, I used a simple C app that I have had for several years now to do the verification. Here is the output from this C app: (Be sure to view this in a fixed width font so that everything lines up correctly) Start: 6655 End: 6675 6655 masked by 6671: 6159 Bit Field: 0001100111111111 Bit Mask: 0001101000001111 Bit Result: 0001100000001111 No Match! 6656 masked by 6671: 6656 Bit Field: 0001101000000000 Bit Mask: 0001101000001111 Bit Result: 0001101000000000 Match! 6657 masked by 6671: 6657 Bit Field: 00011010000...
2003 Jun 05
0
deleting of files in samba ???
Dear Sirs, we're having some inconviniences on files used in a private system, developed to "suit" the company. this system's files are located in /var/wsystems and permissions are granted 4777 acordingly to all files. When we start up and work in this system with ONE user alone, we have no problems whatsoever... however when we start up the whole intranet in this system, most
2003 Jun 05
0
deleting of files by samba ???
Dear Sirs, we're having some inconviniences on files used in a private system, developed to "suit" the company. this system's files are located in /var/wsystems and permissions are granted 4777 acordingly to all files. When we start up and work in this system with ONE user alone, we have no problems whatsoever... however when we start up the whole intranet in this system, most
2014 Mar 11
2
[PATCH] nv50/ir/gk110: fix some instruction emission
Information for this was gathered from nvdisasm. Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> --- Entirely untested. Ben, do you think you'll be able to give this a shot? .../drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp | 33 +++++++++++----------- 1 file changed, 16 insertions(+), 17 deletions(-) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
2020 Nov 06
4
Loop-vectorizer prototype for the EPI Project based on the RISC-V Vector Extension (Scalable vectors)
On 11/6/20 8:49 AM, Roger Ferrer Ibáñez wrote: Hi Sjoerd, Trying to remember how everything fits together here, but could get.active.lane.mask not create the %mask of the VP intrinsics? Or in other words, in the vectoriser, who's producing the %mask and %evl that is consumed by the VP intrinsics? I'm not sure what would be the best way here. I think about the Loop Vectorizer. I imagine
2006 Oct 11
0
"test page failed to print" - How to I resolve this?
This is a new one to me... Drivers install fine, but on some of the printers I get the "test page failed to print" message. I'm getting nothing in the samba logs from the workstation, smbd, nor from the cups logs. I've googled myself silly, but can only find other people asking the same or similar question. Some of them have found permissions to be the problem, but in
2018 Dec 19
3
[RFC] Matrix support (take 2)
...g-term solution we want, we should do > that now (for add and sub) rather than building arbitrary matrix > layout info into intrinsics, since a mask has all the information > that we actually need. > > I think that sounds like a reasonable compromise. We already have > masked load/store intrinsics so adding add and sub just follows that > precedent. If the decision is made to move masking to the core > operations, the new intrinsics would just move as well. How will existing passes be taught about the new intrinsics? For example, what would have to be done to i...
2010 Jan 20
2
Samba shares freezing
All, Looking for some help here. Not finding anything on the net that looks the same as what I'm seeing. Running Solaris 10 Sparc, on a Sunfire 5220, 16Gb of RAM. Samba version 3.4.5 and using ZFS file systems with user quotas. All cifs clients shares to this server freeze after about 10 to 15 minutes of connectivity. Only fix is to restart samba. I'm not getting any errors
2018 Jul 19
4
ACL - samba vs filesystem
hi guys my samba share has inherit acls = Yes and inherits(I guess) from global: create mask = 0744 directory mask = 0755 Now, share's underlying filesystem has acls set on a folder: user::rwx user:me:rwx user:appmgr:r-x group::--- mask::rwx other::--- default:user::rwx default:user:me:rwx default:user:appmgr:r-x default:group::--- default:mask::rwx default:other::--- In shell when I
2017 Oct 17
3
[RFC] Adding Intrinsics for Masked Vector Integer Division and Remainder
Introduction ========== We would like to add support for masked vector signed/unsigned integer division and remainder in the LLVM IR by introducing new target-independent intrinsics. This follows similar work which was done already for masked vector loads and stores - http://lists.llvm.org/pipermail/llvm-dev/2014-October/078059.html. Another relevant referenc...
2008 Aug 02
8
[LLVMdev] Ideas for representing vector gather/scatter and masks in LLVM IR
...<2 x i1> %m The semantics would be to copy %v into %w, and implicitly apply mask %m to all users (recursively) of %w, unless overridden by another applymask. For example: %p = applymask <2 x f32*> %q, <2 x i1> %m %x = load <2 x f32*>* %p ; implicitly masked by %m %y = add <2 x f32> %x, %w ; implicitly masked by %m %z = mul <2 x f32> %y, %y ; implicitly masked by %m This approach minimizes enlargement of IR in code that doesn't use masks, and it reduces the impact on complexity -- a pass like inst...
2020 Nov 09
0
Loop-vectorizer prototype for the EPI Project based on the RISC-V Vector Extension (Scalable vectors)
; RISC-V V & VE(*): ; %mask = get.active.lane.mask(%i, %i) ; %evl = min(256, %n - %i) ; MVE/SVE/AVX : ; %mask = get.active.lane.mask(%i, %n) ; %evl = call @llvm.vscale() For VE, we want to do as much predication as possible through %evl and as little as possible with %mask. This has performance implications on VE and RISC-V - VE does not generate a mask from %evl but %evl is
2008 Aug 05
2
[LLVMdev] Ideas for representing vector gather/scatter and masks in LLVM IR
...d. What I'm talking about here is just in LLVM IR. I agree that we want mask registers as operands during register allocation, and probably also instruction selection. > >> less cluttered. And, it makes it trivially straightforward to write >> passes that work correctly on both masked and unmasked code. > > I had a thought on this, actually. Let's say the mask is the very last > operand on masked instructions. Most passes don't care about the mask > at all. They can just ignore it. Since they don't look at the extra > operand > right now, there...