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2020 Aug 31
2
Metadata in LLVM back-end
...I am not sure it is totally ok.
2. Liveness information are still available after register allocation?
Assuming
a positive answer, live intervals may be split due to register
allocation, making
connection between intrinsic and annotated instruction really difficult.
An enumeration of the MachineInstrucions, which is preserved through the
codegen
passes, would allow the creation of a 1:1 map between intrinsic and
annotated instruction;
but, unfortunately, there seems to not be such kind of enumeration in LLVM
(maybe, SlotIndexes could might be used in a creative way).
Sorry for the long delay!
--...
2020 Aug 18
2
Metadata in LLVM back-end
Am 07/08/20 um 22:54 schrieb David Greene:
> Lorenzo Casalino via llvm-dev <llvm-dev at lists.llvm.org> writes:
>
>>> As with IR-level metadata, there should be no guarantee that metadata is
>>> preserved and that it's a best-effort thing. In other words, relying on
>>> metadata for correctness is probably not the thing to do.
>> Ok, I made a