search for: machinefunctionpasses

Hello everyone, I have written several complex passes till now, but I cannot write a MachineFunctionPass pass. It just gives me segfault. Hence I reduced the pass to the following form : using namespace llvm; namespace { class CFGexplorator : public MachineFunctionPass { public: static char ID; // Pass identification, replacement for typeid CFGexplorator() : MachineFunctionPass(ID)

I want to create share memory in my MachineFunctionPass, and insert load/store instruction for it. The way to create share memory is to add global variables which are in share memory address space (not sure if it is the only way). Therefore, I should add global variables in fixed size in doInitialization, and record its real size in other place like MachineModuleInfo. Then modify or query its real

OK. I know what you mean......... Simply speaking, I want to do some optimizations for PTX, and the information I need is similar to a register allocator. I know PTX is virtual ISA, but I will use PTX as the input of the simulator, gpgpu-sim, so it makes sense. Whether to insert shared memory is depend on the analysis that needs LiveAnalysis, PTX InstrInfo, PTX RegisterInfo, etc. That's why I

Yes, global variables are the only way to access shared memory. I'm just trying to get an idea of what you're aiming to accomplish to see if we can improve on the interface here. A MachineFunctionPass runs after instruction selection and relying on doInitialization to run before instruction selection is an implementation detail that I do not believe is guaranteed anywhere (I could be

I found that : "Code generator passes are registered and initialized specially by TargetMachine::addPassesToEmitFile and similar routines, so they cannot generally be run from the *opt* or *bugpoint* commands."...So how I can run a MachineFunctionPass? In the end, I just want to apply a DFS on a CFG of a function. And I need oriented edges and wanted to use

I investigated the MachineFunctionPass (that is runOnMachineFunction, I believe). In my experimentation it didn't seem that the MachineFrameInfo was populated (it consistently said that the stack depth was 0, for example). I might have been doing something wrong? On Fri, Jul 8, 2011 at 5:21 PM, John Criswell <criswell at illinois.edu> wrote: > On 7/8/11 4:09 PM, Andrew Ruef wrote:

Deer All, I wanted to write MachineFunctionPass which needs to be run after global register allocation pass. I have read LLVM documentation and blogs and able to write simple pass which will is invoked through opt command line. However, I could able to find any blogs or document to explains clear steps for writing MachineFunctionPass. Please suggest some documents or blogs which will help me

Is there any way you could approximate the register/instruction usage and perform live-range analysis in a higher-level LLVM IR pass? I'm not sure how useful NVPTXRegisterInfo would be anyway. Unlike backends that target "real" ISAs, these structures do not contain any special properties about registers or instructions, like cost or scheduling information. Are you trying to figure

Hello everyone, I have written simple LLVM passes, but I cannot able to write a MachineFunctionPass pass. I am following the steps form the following link but it is not working: http://www.gabriel.urdhr.fr/2014/09/26/adding-a-llvm-pass/ Please share the sample MachineFunctionPass code or steps to follow to write MachineFunctionPass. Thanks, Bala -- Thanks, Bala IIITA Allahabad --------------

Hello, I want to add a global variable of arrayType in my MachineFunctionPass. However, I only get const Module from MachineFunction.getMMI().getModule(). I can't add any global variable to a const Module. Another way is to add a global variable in doInitialization in my MachineFunctionPass, but I can't determine the size of my arrayType for global variable in doInitialization. Is there

Yes, total number of PTX registers that will be emitted is exactly what I need. It's hard to figure out this in LLVM IR level. 2013/8/7 Justin Holewinski <justin.holewinski at gmail.com> > Is there any way you could approximate the register/instruction usage and > perform live-range analysis in a higher-level LLVM IR pass? I'm not sure > how useful NVPTXRegisterInfo

Micah, Thanks for your help. I will study on that code. Justin, Sorry for my misleading word. Local memory in OpenCL is the same as share memory in CUDA. What I mean is share memory, so MachineFrameInfo is not suitable to me. And I need codegen data, so FunctionPass is also not suitable. Anyway, thanks for the suggestion. Antony 2013/8/5 Justin Holewinski <justin.holewinski at

Hello all, I need to modify llvm bytecode / native code just before it is emitted i.e. after all the regular operations and optimizations are done. I was told that this can be achieved by implementing a MachineFunctionPass. I searched the internet for some tutorials or some example MachineFunctionPass but found nothing. Kindly point some links, or anything that may help. Thank you. Regards,

Can you tell us a bit more about what you're trying to accomplish? Changes to the IR performed during MachineFunctionPass::doInitialization will likely propagate down through code generation, but at that point what is the purpose of using a MachineFunctionPass? You won't have any analysis or instruction information available until runOnMachineFunction. On Mon, Aug 5, 2013 at 12:00 PM,

On 7/8/11 4:49 PM, Andrew Ruef wrote: > I investigated the MachineFunctionPass (that is runOnMachineFunction, > I believe). A MachineFunctionPass is a class that you inherit from to write a transform that operates on MachineInstrs (i.e., native code instructions generated from the LLVM IR instructions). The runOnMachineFunction() method is its entry point (i.e., the code generator

Micah, As you expected, I am trying to create local memory but in the NVPTX backend. It's really not convenient that I can't create local memory in runOnMachineFunction. Hmm.... Since I should do it at doInitialization stage, I also need to do some tricks in global variable and AsmPrinter to resize it. Did you use the similar way? Antony 2013/8/5 Micah Villmow <micah.villmow at

Does this count have to be exact, or just an accurate approximation? The back-end may add/remove registers fairly late in the codegen process, so if you need an exact count you may need to run *just* before the assembly printer. Perhaps we could introduce a special machine node that represents a shared memory allocation. The node's value would be the shared address space pointer of the

Antony, What are you trying to accomplish in this case? I did something very similar in the AMDIL backend, but it was not the cleanest solution and you are correct it has to be do at doInitialization stage and not at runOnMachineFunction. Micah > -----Original Message----- > From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] > On Behalf Of Antony Yu > Sent:

First you should learn how to write a pass and then a MachineFunctionPass. >From LLVM website, you can refer to http://llvm.org/docs/WritingAnLLVMPass.html And for outside pass, you can refer to http://adriansampson.net/blog/llvm.html It's a great article. And the author put the source code on Github <https://github.com/sampsyo/llvm-pass-skeleton>. 2016-03-01 14:36 GMT+08:00

If you're running a MachineFunctionPass, then the code has already been lowered to machine instructions and modifying the original IR will most likely not do what you want. You should only be using the IR as an immutable object for reference. If you want to change the IR, I would suggest using a FunctionPass instead of a MachineFunctionPass. Unless you need codegen data. At the