search for: machinefunctionpass'es

...I did for X86 as mentioned in my previous posts. When I run > the following command: > > > Have you modified the ARM code generator to run your pass (the same way > that you modified the X86 code generator to run your pass)? > > Each backend has code that configures the set of MachineFunctionPass'es to > run when that code generator is used. For each backend, you must modify > that code to run your MachineFunctionPass. > > Regards, > > John Criswell > > > llc -march=arm test.ll -o test > nothing prints out. I did the same for MIPS target too and I got no &...

...u do not need to create a new backend. All you need to do is to >>> add your pass to the list of passes that are run when the MIPS code >>> generator is used. >>> >>> In LLVM 3.3, there was a file in the X86 backend that had code to >>> schedule all the MachineFunctionPass'es when the X86 code generator was >>> used. That was in lib/Target/X86/X86TargetMachine.cpp. You can probably >>> find a similar file for LLVM 3.7 for the MIPS backend. >>> >>> So, to summarize, you'll add your source file to the MIPS backend, add a &...

...you think it will take to be get familiar with backend and be able to write machinefunction pass? for further steps I have to implement a register allocation algorithm. Regards, Fami On Tue, Nov 3, 2015 at 3:52 PM, John Criswell <jtcriswel at gmail.com> wrote: > Dear Fami, > > A MachineFunctionPass is run by the code generator, so you can only use it > in tools like llc, clang, and libLTO. The opt program only manipulates > LLVM IR and therefore does not run MachineFunctionPass'es. > > Regarding documentation, have you looked at the following? > > http://llvm.org/docs/W...

...gt; backend files? > > > No, you do not need to create a new backend. All you need to do is to add > your pass to the list of passes that are run when the MIPS code generator > is used. > > In LLVM 3.3, there was a file in the X86 backend that had code to schedule > all the MachineFunctionPass'es when the X86 code generator was used. That > was in lib/Target/X86/X86TargetMachine.cpp. You can probably find a > similar file for LLVM 3.7 for the MIPS backend. > > So, to summarize, you'll add your source file to the MIPS backend, add a > line somewhere to run your p...

On 5/12/11 11:46 AM, Arushi Aggarwal wrote: > I tried > llc -load /localhome/aggarwa4/llvm27/llvm-obj/projects/poolalloc/Debug/lib/libCodegen.so > --help > > But this does not show my pass. It says it is an unknown command line argument. I'm assuming you've looked at other MachineFunctionPass'es and have registered yours in the same way that they do. I don't think they're registered like regular LLVM passes, but I don't recall. -- John T. > Arushi > > On Thu, May 12, 2011 at 11:21 AM, John Criswell<criswell at illinois.edu> wrote: >> On 5/12/11...

I tried llc -load /localhome/aggarwa4/llvm27/llvm-obj/projects/poolalloc/Debug/lib/libCodegen.so --help But this does not show my pass. It says it is an unknown command line argument. Arushi On Thu, May 12, 2011 at 11:21 AM, John Criswell <criswell at illinois.edu> wrote: > On 5/12/11 11:17 AM, Arushi Aggarwal wrote: >> >> What is the correct way to register/run a machine

...can do this? Is there a way I can subclass > the X86 code generator to "hook" those two methods and insert my > instrumentation? Is there something I'm missing with > runOnMachineFunction? I'm stepping beyond what I know a little bit, but have you looked at writing a MachineFunctionPass? A student here at Illinois wrote a MachineFunctionPass to insert additional epilogue code into functions. Assuming that it's possible, putting your functionality into a MachineFunctionPass should be cleaner than modifying the code generator directly (MachineFunctionPass'es may even b...

I investigated the MachineFunctionPass (that is runOnMachineFunction, I believe). In my experimentation it didn't seem that the MachineFrameInfo was populated (it consistently said that the stack depth was 0, for example). I might have been doing something wrong? On Fri, Jul 8, 2011 at 5:21 PM, John Criswell <criswell at illinoi...

Hi list, I am trying to implement the technique outlined in the following paper: http://www.cs.umd.edu/~mwh/papers/martin10ownership.html in LLVM. My approach so far involves the use of an IR level transform (via runOnFunction) to identify memory loads and stores. One thing I need to do (I am pretty sure I need to do it at least) is automatically mark each stack frame as "owned" by the

...anything useful or questions were unanswered. Can anyone reference me to any material on how to do that or help me with my roblem. I have created a folder in: lib/Transform and put my pass in it. I am writing a simple pass like this: using namespace llvm; namespace { struct analyzer : public MachineFunctionPass { static char ID; analyzer() : MachineFunctionPass(ID) {} virtual bool runOnMachineFunction(MachineFunction &MF) { errs() << "hello " ; return false; } }; } char analyzer::ID = 0; static RegisterPass<analyzer> X("analyzer", "WAW analyzer"); I make it...

On 7/8/11 4:49 PM, Andrew Ruef wrote: > I investigated the MachineFunctionPass (that is runOnMachineFunction, > I believe). A MachineFunctionPass is a class that you inherit from to write a transform that operates on MachineInstrs (i.e., native code instructions generated from the LLVM IR instructions). The runOnMachineFunction() method is its entry point (i.e., the...

...ventional compiler technique adds extra checking code into the target source or target IR in an invasive manner. Since code generator combines the added code with the original one, they don't need to correlate these two information. It is being implemented as an LLVM analysis pass by using * MachineFunctionPass*. If it is MachineBasicBlock or MachineInstruction, does it possible to get the starting address of real basic block and the exact (runtime) address of real instruction? Unlike the FunctionPass, my MachineFunctionPass gets an error when it is loaded by opt. The class has constructor, virtfn, run...