Displaying 10 results from an estimated 10 matches for "m128".
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2012 Jun 27
1
[PATCH] x86/hvm: increase struct hvm_vcpu_io's mmio_large_read
...end up adjacent to each other.
Signed-off-by: Jan Beulich <jbeulich@suse.com>
--- a/xen/include/asm-x86/hvm/vcpu.h
+++ b/xen/include/asm-x86/hvm/vcpu.h
@@ -59,13 +59,13 @@ struct hvm_vcpu_io {
unsigned long mmio_gva;
unsigned long mmio_gpfn;
- /* We may read up to m128 as a number of device-model transactions. */
+ /* We may read up to m256 as a number of device-model transactions. */
paddr_t mmio_large_read_pa;
- uint8_t mmio_large_read[16];
+ uint8_t mmio_large_read[32];
unsigned int mmio_large_read_bytes;
- /* We may write up to m128 as a...
2011 Nov 30
0
[PATCH 2/4] x86/emulator: add emulation of SIMD FP moves
...REFIX(dst, vex_pfx) do { \
+ if ( vex_pfx ) \
+ (dst) = sse_prefix[(vex_pfx) - 1]; \
+} while (0)
+
union vex {
uint8_t raw[2];
struct {
@@ -3850,6 +3860,76 @@ x86_emulate(
case 0x19 ... 0x1f: /* nop (amd-defined) */
break;
+ case 0x2b: /* {,v}movntp{s,d} xmm,m128 */
+ /* vmovntp{s,d} ymm,m256 */
+ fail_if(ea.type != OP_MEM);
+ /* fall through */
+ case 0x28: /* {,v}movap{s,d} xmm/m128,xmm */
+ /* vmovap{s,d} ymm/m256,ymm */
+ case 0x29: /* {,v}movap{s,d} xmm,xmm/m128 */
+ /* vmovap{s,d} ymm,ymm/m...
2019 Aug 09
0
[RFC PATCH v6 79/92] kvm: x86: emulate movsd xmm, m64
...@@ -1177,6 +1177,27 @@ static int em_fnstsw(struct x86_emulate_ctxt *ctxt)
return X86EMUL_CONTINUE;
}
+static u8 simd_prefix_to_bytes(const struct x86_emulate_ctxt *ctxt,
+ int simd_prefix)
+{
+ u8 bytes;
+
+ switch (ctxt->b) {
+ case 0x11:
+ /* movsd xmm, m64 */
+ /* movups xmm, m128 */
+ if (simd_prefix == 0xf2) {
+ bytes = 8;
+ break;
+ }
+ /* fallthrough */
+ default:
+ bytes = 16;
+ break;
+ }
+ return bytes;
+}
+
static void decode_register_operand(struct x86_emulate_ctxt *ctxt,
struct operand *op)
{
@@ -1187,7 +1208,7 @@ static void decode_register_ope...
2017 Oct 02
5
SSE instructions and alignment of the return value of 'new'
I have some programs crashing when I upgraded from clang 3.9.1 to clang 4.0.1.
Debugging this I found the reason for the crash. This is happening in the following assembly fragment for a piece of code allocating a class object (size: 24 bytes) using operator new and then initializing it:
0x00002aaaafc145f3 <+35>: callq 0x2aaaafdf5f90 <operator new(unsigned long)>
2004 Dec 02
3
Tbench benchmark numbers seem to be limiting samba performance in the 2.4 and 2.6 kernel.
...y all on
one drive, however, I have taken this into account and still am unable to
account for my machine's poor performance. All drives are on their own IDE
channel, no master slave combos, as suggested in the RAID howto.
To tune these drives, I use:
hdparm -c3 -d1 -m16 -X68 -k1 -A1 -a128 -M128 -u1 /dev/hd[kigca]
I have tried different values for -a. I use 128, because this corresponds
closely with the 64k stripe of the raid 5 array. I ran hdparm -Tt on each
individual drive as well as both of the raid arrays and included these
numbers below. The numbers I got were pretty low for mode...
2012 Jul 27
0
[LLVMdev] X86 FMA4
Hey Michael,
Thanks for the legwork!
It appears that the stats you listed are for movaps [SSE], not vmovaps
[AVX]. I would *assume* that vmovaps(m128) is closer to vmovaps(m256),
since they are both AVX instructions. Although, yes, I agree that this is
not clear from Agner's report. Please correct me if I am misunderstanding.
As I am sure you are aware, we cannot use SSE (movaps) instructions in an
AVX context, or else we'll pay the con...
2012 Jul 27
2
[LLVMdev] X86 FMA4
Just looked up the numbers from Agner Fog for Sandy Bridge for vmovaps/etc for loading/storing from memory.
vmovaps - load takes 1 load mu op, 3 latency, with a reciprocal throughput of 0.5.
vmovaps - store takes 1 store mu op, 1 load mu op for address calculation, 3 latency, with a reciprocal throughput of 1.
He does not list vmovsd, but movsd has the same stats as vmovaps, so I feel it is a
2012 Jul 27
3
[LLVMdev] X86 FMA4
> It appears that the stats you listed are for movaps [SSE], not vmovaps [AVX]. I would *assume* that vmovaps(m128) is closer to vmovaps(m256), since they are both AVX instructions. Although, yes, I agree that this is not clear from Agner's report. Please correct me if I am misunderstanding.
You are misunderstanding [no worries, happens to everyone = )]. The timings I listed were for vmovaps of the form,...
2019 Aug 09
117
[RFC PATCH v6 00/92] VM introspection
...ring emulation
kvm: x86: emulate movsd xmm, m64
kvm: x86: emulate movss xmm, m32
kvm: x86: emulate movq xmm, m64
kvm: x86: emulate movq r, xmm
kvm: x86: emulate movd xmm, m32
kvm: x86: enable the half part of movss, movsd, movups
kvm: x86: emulate lfence
kvm: x86: emulate xorpd xmm2/m128, xmm1
kvm: x86: emulate xorps xmm/m128, xmm
kvm: x86: emulate fst/fstp m64fp
kvm: x86: make lock cmpxchg r, r/m atomic
kvm: x86: emulate lock cmpxchg8b atomically
kvm: x86: emulate lock cmpxchg16b m128
kvm: x86: fallback to the single-step on multipage CMPXCHG emulation
Mircea C?rjaliu...
2019 Aug 09
117
[RFC PATCH v6 00/92] VM introspection
...ring emulation
kvm: x86: emulate movsd xmm, m64
kvm: x86: emulate movss xmm, m32
kvm: x86: emulate movq xmm, m64
kvm: x86: emulate movq r, xmm
kvm: x86: emulate movd xmm, m32
kvm: x86: enable the half part of movss, movsd, movups
kvm: x86: emulate lfence
kvm: x86: emulate xorpd xmm2/m128, xmm1
kvm: x86: emulate xorps xmm/m128, xmm
kvm: x86: emulate fst/fstp m64fp
kvm: x86: make lock cmpxchg r, r/m atomic
kvm: x86: emulate lock cmpxchg8b atomically
kvm: x86: emulate lock cmpxchg16b m128
kvm: x86: fallback to the single-step on multipage CMPXCHG emulation
Mircea C?rjaliu...