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2012 Jan 26
2
[LLVMdev] HELP - tblgen -gen-asm-matcher restrictions on .td content
...-subtarget)
add_public_tablegen_target(MipsCommonTableGen)
When I started trying to generate MipsGenAsmMatcher.inc for the assembler I started getting errors.
tblgen -gen-asm-matcher -I ~/workarea/asm/llvm/include/ Mips.tdIncluded from Mips.td:24:
MipsInstrInfo.td:833:14: error: Instruction 'LWL' has no tokens
defm LWL : LoadUnAlign32<0x22>;
How does it get a token?
Commenting out this code I got farther and found that a register that didn't have a formal def in MipsRegisterInfo.td would get flagged.
!strconcat(instr_asm, "\t$$zero, $rs, $rt"),
% tblgen...
2002 Aug 06
2
Memory leak in R v1.5.1?
...e(paste(fName, "rnw", sep="."),
driver=Rtangle()); sourc
e(paste(fName, "R", sep="."), local = TRUE)
Writing to file designOpt.R
4 : designOpt-designCollectionFileFuncs.R
hybridDesignOpt() called with: weight.margin= 0 , KG.margin= 0
GA Design: ShipMathModel( LWL=551.205711406606, B=45.4637940845938,
Cp=0.7198803735
31636, Cx=0.837682085129617, W.BP=872.396799843704,
H.DKh=12.0780590098038, H.DKd=8
.25941049673737 ) = (Cost=3.16 , Err.Pwr=15.0, Err.Range=18.5, B/H=3.55)
Garbage collection 170 = 160+7+3 (level 2) ...
147999 cons cells free (26%)
7.8 Mbytes o...
2012 Feb 03
0
[LLVMdev] HELP - tblgen -gen-asm-matcher restrictions on .td content
...blegen_target(MipsCommonTableGen)
>
> When I started trying to generate MipsGenAsmMatcher.inc for the assembler I started getting errors.
>
> tblgen -gen-asm-matcher -I ~/workarea/asm/llvm/include/ Mips.tdIncluded from Mips.td:24:
> MipsInstrInfo.td:833:14: error: Instruction 'LWL' has no tokens
> defm LWL : LoadUnAlign32<0x22>;
>
> How does it get a token?
>
>From the assembly string used by the instruction printer. That's saying there's a variant in the multi class expansion that doesn't have a string associated with it that can...
2013 Feb 28
0
[LLVMdev] [cfe-dev] [MIPS] How can I add a constraint to LLVM/Clang for MIPS BE?
...R"(*p)
);
printf("out is %d\n", out);
p = &b;
__asm volatile (
"lw %0, %1\n\t"
: "=r"(out)
: "R"(*p)
);
printf("out is %d\n", out);
p = &c;
__asm volatile (
"lwl %0, 1 + %1\n\t"
"lwr %0, 2 + %1\n\t"
: "=r"(out)
: "R"(*p)
);
printf("out is %x\n", out);
return 0;
}
LLVM-MIPS-BE diff:
diff --git a/lib/Target/Mips/MipsISelLowering.cpp
b/lib/Target/Mips/MipsISelLowering.cpp
in...
2018 May 01
2
Alignment Member Functions should be Virtual
Dear community,
I have developed a backend of new 32-bit RISC ISA, which does not have
unaligned memory access instructions (e.g., LWL, LWR, SWL, and SWR in
MIPS).
Since char and short variables are not 32-bit alignment, these
variables cannot be correctly accessed.
Therefore, alignment member functions, especially getCharAlign() and
getShortAlign() of TargetInfo class in
clang/include/clang/Basic/TargetInfo.h, should be virtual,...
2013 Mar 04
2
[LLVMdev] [MIPS] How can I add a constraint to LLVM/Clang for MIPS BE?
...h=mipsel -filetype=asm
llvm-install/bin/llc constraints.ll -o constraints.o -mcpu=mips32r2
-march=mipsel -filetype=obj
mipsel-unknown-linux-gnu-gcc -mips32r2 -O3 -EL -fPIC -static -o
constraints.exe constraints.o
the inline-asm is:
#APP
lw $5, 0($1)
#NO_APP
#APP
lw $5, 0($1)
#NO_APP
#APP
lwl $5, 1 + 0($1)
lwr $5, 2 + 0($1)
#NO_APP
It use different registers, but $1, that is $AT, cann't be used, it is
reserved for $AS using.
any ideas?
> inline_asm: run *.exe
> out is 4
> out is 10
> out is ccddffbb
> inline_asm:
>
Regards,
Jia
2018 May 02
0
Alignment Member Functions should be Virtual
On 5/1/2018 4:35 AM, Hiroyuki Chishiro via llvm-dev wrote:
> Dear community,
>
> I have developed a backend of new 32-bit RISC ISA, which does not have
> unaligned memory access instructions (e.g., LWL, LWR, SWL, and SWR in
> MIPS).
> Since char and short variables are not 32-bit alignment, these
> variables cannot be correctly accessed.
> Therefore, alignment member functions, especially getCharAlign() and
> getShortAlign() of TargetInfo class in
> clang/include/clang/Basic/Tar...
2013 Mar 05
0
[LLVMdev] [MIPS] How can I add a constraint to LLVM/Clang for MIPS BE?
...s.o -mcpu=mips32r2
> -march=mipsel -filetype=obj
> mipsel-unknown-linux-gnu-gcc -mips32r2 -O3 -EL -fPIC -static -o
> constraints.exe constraints.o
>
> the inline-asm is:
> #APP
> lw $5, 0($1)
> #NO_APP
>
> #APP
> lw $5, 0($1)
> #NO_APP
>
> #APP
> lwl $5, 1 + 0($1)
> lwr $5, 2 + 0($1)
> #NO_APP
>
> It use different registers, but $1, that is $AT, cann't be used, it is
> reserved for $AS using.
> any ideas?
>
>> inline_asm: run *.exe
>> out is 4
>> out is 10
>> out is ccddffbb
>> inline_as...
2018 May 03
3
Alignment Member Functions should be Virtual
...GMT+09:00 Friedman, Eli <efriedma at codeaurora.org>:
> On 5/1/2018 4:35 AM, Hiroyuki Chishiro via llvm-dev wrote:
>>
>> Dear community,
>>
>> I have developed a backend of new 32-bit RISC ISA, which does not have
>> unaligned memory access instructions (e.g., LWL, LWR, SWL, and SWR in
>> MIPS).
>> Since char and short variables are not 32-bit alignment, these
>> variables cannot be correctly accessed.
>> Therefore, alignment member functions, especially getCharAlign() and
>> getShortAlign() of TargetInfo class in
>> clang...
2004 Dec 14
5
wxRuby and other GUI toolkits
So, having subscribed recently to the ruby-talk mailing list, I''ve
noticed that wxruby doesn''t seem to have the "respect" of other GUI
libraries. I know GUI-library preference is a holy war almost up there
with vi versus emacs, but since I''m a wxruby developer, I''d like to know
what people "don''t" like about wxruby. Otherwise,