Displaying 16 results from an estimated 16 matches for "longword".
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longwood
2012 May 12
0
bug report for network device i82599er: eepro100_write4: Assertion `!"feature is missing in this emulation: " "unknown longword write"' failed.
When trying to start a FreeBSD 9.0 HVM guest I see the following line
in qemu-dm-freebsd.log:
qemu-dm: /src/xen-stable-hg/src/xen-4.1-testing.hg-build/tools/ioemu-dir/hw/eepro100.c:1320: eepro100_write4: Assertion `!"feature is missing in this emulation: " "unknown longword write"'' failed.
The domain crashes.
I suspect this occurs because I am trying to build the domain with a
vif where model=i82559er. Changing the model to e1000 does build
the domain.
I would prefer to have the ability to use 10Gbps because my physical
nic is also a 10Gbps nic:
02:...
2001 Feb 14
1
Problem with seek functions,
On Mon, 12 February 2001, OmegaDan wrote:
[snip code]
Hmm, weird.. that does work for me. I only had the trouble that ov_time_tell returned negative infinity
after a ov_time_seek to 0 secs. This is my code:
function TMainForm.ReadBuf(Buffer: PChar; Size: Longword; var Time: Single): Longword;
var BytesRead, Change: Longword;
begin
BytesRead := 0;
Time := ov_time_tell(vf^);
if Time < 0 then // check against NAN, -INF
Time := 0;
repeat
Change := ov_read(vf^, @Buffer[BytesRead], Size - BytesRead, 0, 2, 1, StreamNumber);
BytesRead :...
2013 Sep 17
1
[LLVMdev] [llvm] r190328 - Revert patches to add case-range support for PR1255.
...kinds of external symbol offsets is
complicated in mips and if you are not careful you can end up with some
strange boundary condition errors.
This seems to be what the problem is here.
When the two instruction sequence is placed at the beginning of the
function, you are guaranteed that it is longword aligned but in other
places in mips16 code, you can have instructions starting on halfword
boundaries.
That is what appears to the problem.
In principle, you can put this sequence anywhere but in some strange
cases, if it is not longword aligned, the address calculation overflows
and comes ou...
2016 Nov 13
2
llc generating code that writes below the stack pointer on darwin/x86-64
...line assembly below?
***
target datalayout =
"e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
target triple = "x86_64-apple-macosx10.5"
define void @"\01_SYSTEM_$$_SETMXCSR$LONGWORD"(i32 %p.w) nobuiltin {
; [71] procedure SetMXCSR(w : dword);
%tmp.1 = alloca i32, align 4
; Var w located at %tmp.1
; [72] begin
store i32 %p.w, i32* %tmp.1, align 4
; [73] defaultmxcsr:=w;
%reg.1_16 = load i32, i32* %tmp.1, align 4
store i32 %reg.1_16, i32*...
2009 Apr 07
2
Running an R script from Delphi 7
...entlepersons:
A long time ago I used to be able to start R (version 2.6.1) from a
Delphi 7 program and run a script by using a procedure like the following:
function StartRAndWait (CommandLine : string) : Boolean;
var
Proc_info: TProcessInformation;
Startinfo: TStartupInfo;
ExitCode: longword;
CreateOK : Boolean;
begin
Result := False;
{ Initialize the structures }
FillChar(proc_info, sizeof (TProcessInformation), #0);
FillChar(startinfo, sizeof (TStartupInfo), #0);
Startinfo.cb := sizeof (TStartupInfo);
Startinfo.dwFlags := STARTF_USESHOWWINDOW or STARTF_U...
2011 Jul 26
2
[LLVMdev] XOR Optimization
...gt; But first I would like to check with you guys that it really does not exist.
>
> For a simple loop like this:
>
> nbits = 128;
> bit_addr = 0;
> while(nbits--)
> {
> bindex=bit_addr>>5; /* Index is number /32 */
> bitnumb=bit_addr % 32; /* Bit number in longword */
> bitmap[bindex]^=(1L<<bitnumb);
> bit_addr++;
> }
>
>
> The -O3 set of optimizations generates a code like this:
>
>
> entry:
> br label %while.body
>
> while.body: ; preds = %while.body,
> %entry
> %0...
2006 Dec 04
8
Calling R functions in Delphi
Hello All,
We would like to call quantile() function from the R-package STATS in a
Delphi program. If this is possible, could anyone provide us with an
example?
Thanks in advance.
--Anna
-----------------------------------------
Anna Belova
Abt Associates Inc.
4800 Montgomery Ln, St 600
Bethesda, MD-20814
phone: 301-347-5304
fax: 301-652-7530
http://www.abtassociates.com/environment
2011 Jul 26
2
[LLVMdev] XOR optimization
...llvm, and
therefore I am about to implement it.
But first I would like to check with you guys that it really does not exist.
For a simple loop like this:
nbits = 128;
bit_addr = 0;
while(nbits--)
{
bindex=bit_addr>>5; /* Index is number /32 */
bitnumb=bit_addr % 32; /* Bit number in longword */
bitmap[bindex]^=(1L<<bitnumb);
bit_addr++;
}
The -O3 set of optimizations generates a code like this:
entry:
br label %while.body
while.body: ; preds = %while.body,
%entry
%0 = phi i32 [ 0, %entry ], [ %inc.3, %while.body ]
%shr = lshr i32...
2016 Oct 31
1
PIC and mcmodel=large on x86 doesn't use any relocations
...g
>
OpenVMS on both Alpha and Itanium are mixed-sized pointer systems.
The default size is 32-bits but there are also 64-bit interfaces.
Some of our languages have 64-bit pointers, but some do not. They
still are VAX-era languages which believe you can hold a pointer to
a routine in a 32-bit longword. To have code actually in 64-bit
address space, the way we implement this on Itanium is to keep the
function descriptors and short section in 32-bit space. The
address of a "routine" is the address of its function descriptor
since you need both the code address and the GP value to call...
2011 Jul 26
0
[LLVMdev] XOR Optimization
...that it really does not
> exist.
> >
> > For a simple loop like this:
> >
> > nbits = 128;
> > bit_addr = 0;
> > while(nbits--)
> > {
> > bindex=bit_addr>>5; /* Index is number /32 */
> > bitnumb=bit_addr % 32; /* Bit number in longword */
> > bitmap[bindex]^=(1L<<bitnumb);
> > bit_addr++;
> > }
> >
> >
> > The -O3 set of optimizations generates a code like this:
> >
> >
> > entry:
> > br label %while.body
> >
> > while.body:...
2006 Oct 04
0
[PATCH,RFC 6/17] 32-on-64 shared info handling
...================================================================
--- 2006-10-04.orig/xen/arch/x86/domain.c 2006-10-04 15:03:07.000000000 +0200
+++ 2006-10-04/xen/arch/x86/domain.c 2006-10-04 15:11:03.000000000 +0200
@@ -550,10 +550,10 @@ static void load_segments(struct vcpu *n
/* CS longword also contains full evtchn_upcall_mask. */
cs_and_mask = (unsigned short)regs->cs |
- ((unsigned int)n->vcpu_info->evtchn_upcall_mask << 16);
+ ((unsigned int)vcpu_info(n, evtchn_upcall_mask) << 16);
/* Fold upcall mask int...
2010 Sep 11
2
Re: Trouble with libgsm on Mac OS X 10.6.2
ralniv wrote:
> Below are my instructions for getting a libgsm friendly version of Wine compiled on SnowLeopard. I assume that you already have wine-devel installed and configured to your liking. I also assume that you use MacPorts for package management.
>
> [1] Uninstall wine-devel
>
> Code:
> sudo port uninstall wine-devel
>
>
>
> [2] Edit the portfile for
2007 Jul 13
7
vmx status report against changeset 15521 - 2 new issues
New issues (2)
=================================================
1) Data corrupted after copied into a 32bit win2k3 guest on 64bit
hypervisor with rtl8139
http://bugzilla.xensource.com/bugzilla/show_bug.cgi?id=1025
2) pcnet network of 32bit win2k/64bit hypervisor is not stable.
http://bugzilla.xensource.com/bugzilla/show_bug.cgi?id=1026
Fixed issues (1)
2006 Mar 21
1
weird bugs with mmap-ing via NFS
[Moved from -current to -stable]
???????? 21 ???????? 2006 16:23, Matthew Dillon ?? ????????:
> ? ? You might be doing just writes to the mmap()'d memory, but the system
> ? ? doesn't know that.
Actually, it does. The program tells it, that I don't care to read, what's
currently there, by specifying the PROT_READ flag only.
> ? ? The moment you touch any mmap()'d
2012 Nov 19
0
[PATCH 242/493] pci: remove use of __devinit
...c(struct pci_dev *dev)
+static void quirk_ich7_lpc(struct pci_dev *dev)
{
/* We share the common ACPI/GPIO decode with ICH6 */
ich6_lpc_acpi_gpio(dev);
@@ -648,7 +648,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH10_1, qui
* VIA ACPI: One IO region pointed to by longword at
* 0x48 or 0x20 (256 bytes of ACPI registers)
*/
-static void __devinit quirk_vt82c586_acpi(struct pci_dev *dev)
+static void quirk_vt82c586_acpi(struct pci_dev *dev)
{
u32 region;
@@ -666,7 +666,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_3, quirk_vt
* 0x...
2012 Nov 19
0
[PATCH 242/493] pci: remove use of __devinit
...c(struct pci_dev *dev)
+static void quirk_ich7_lpc(struct pci_dev *dev)
{
/* We share the common ACPI/GPIO decode with ICH6 */
ich6_lpc_acpi_gpio(dev);
@@ -648,7 +648,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH10_1, qui
* VIA ACPI: One IO region pointed to by longword at
* 0x48 or 0x20 (256 bytes of ACPI registers)
*/
-static void __devinit quirk_vt82c586_acpi(struct pci_dev *dev)
+static void quirk_vt82c586_acpi(struct pci_dev *dev)
{
u32 region;
@@ -666,7 +666,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_3, quirk_vt
* 0x...