Displaying 2 results from an estimated 2 matches for "loadunalign32".
2012 Jan 26
2
[LLVMdev] HELP - tblgen -gen-asm-matcher restrictions on .td content
...(MipsCommonTableGen)
When I started trying to generate MipsGenAsmMatcher.inc for the assembler I started getting errors.
tblgen -gen-asm-matcher -I ~/workarea/asm/llvm/include/ Mips.tdIncluded from Mips.td:24:
MipsInstrInfo.td:833:14: error: Instruction 'LWL' has no tokens
defm LWL : LoadUnAlign32<0x22>;
How does it get a token?
Commenting out this code I got farther and found that a register that didn't have a formal def in MipsRegisterInfo.td would get flagged.
!strconcat(instr_asm, "\t$$zero, $rs, $rt"),
% tblgen -gen-asm-matcher -I ~/workarea/asm/llvm/include...
2012 Feb 03
0
[LLVMdev] HELP - tblgen -gen-asm-matcher restrictions on .td content
...; When I started trying to generate MipsGenAsmMatcher.inc for the assembler I started getting errors.
>
> tblgen -gen-asm-matcher -I ~/workarea/asm/llvm/include/ Mips.tdIncluded from Mips.td:24:
> MipsInstrInfo.td:833:14: error: Instruction 'LWL' has no tokens
> defm LWL : LoadUnAlign32<0x22>;
>
> How does it get a token?
>
>From the assembly string used by the instruction printer. That's saying there's a variant in the multi class expansion that doesn't have a string associated with it that can be used to derive the syntax.
> Commenting out th...