search for: lesliezhai

Displaying 17 results from an estimated 17 matches for "lesliezhai".

2017 Dec 19
4
Register Allocation Graph Coloring algorithm and Others
...est solution, I still want to >> practice and see the benchmark, I am not computing professionals, I >> am only 34 olds, perhaps I have enough time to waste :) >> >> >> 在 2017年12月19日 00:41,dag at cray.com <mailto:dag at cray.com>写道: >>> Leslie Zhai <lesliezhai at llvm.org.cn <mailto:lesliezhai at llvm.org.cn>> >>> writes: >>> >>>> * Memory (20 - 100 cycles) is expensive than Register (1 cycle), but >>>> it has to spill code when PhysReg is unavailable >>> As Vladimir said, the cache makes this...
2018 May 29
2
LLVM Social - Beijing: May 19th, 2018
...M social in Shanghai, Hang Zhou and Shen Zhen. I hope one day there is LLVM developer meeting in China :) 在 2018年05月29日 14:13, Chris Lattner 写道: > This is really great, thank you for getting this off the ground! > > -Chris > > >> On May 28, 2018, at 9:42 PM, Leslie Zhai <lesliezhai at llvm.org.cn> wrote: >> >> Hi LLVM developers, >> >> My sincere thanks will goto Wu Wei for his great organization! >> >> I shared a topic " to introduce Loongson's contribution to LLVM and GCC toolchain. >> >> Slide: https://www.leetcod...
2017 Jul 25
2
How to migrate x86_sse2_psrl_dq after LLVM v3.8?
Hi LLVM developers, After Remove int_x86_sse2_psll_dq_bs and int_x86_sse2_psrl_dq_bs intrinsics. The builtins aren't used by clang. https://reviews.llvm.org/rL229069 there was no Intrinsic::x86_sse2_psrl_dq any more, then how to migrate: Function *F = Intrinsic::getDeclaration(TheModule, Intrinsic::x86_sse2_psrl_dq); Result = Builder.CreateCall(F,
2018 May 29
2
LLVM Social - Beijing: May 19th, 2018
...developer meeting in China :) >> >> >>> 在 2018年05月29日 14:13, Chris Lattner 写道: >>> This is really great, thank you for getting this off the ground! >>> >>> -Chris >>> >>> >>>> On May 28, 2018, at 9:42 PM, Leslie Zhai <lesliezhai at llvm.org.cn> wrote: >>>> >>>> Hi LLVM developers, >>>> >>>> My sincere thanks will goto Wu Wei for his great organization! >>>> >>>> I shared a topic " to introduce Loongson's contribution to LLVM and GCC toolcha...
2018 May 11
4
LLVM Social - Beijing: May 19th, 2018
Hi, The first (maybe) LLVM social in Beijing will happen on May 19th, 2018. Everyone interested in LLVM related projects is invited to join. Event details is at https://github.com/hellollvm/website/blob/master/README.md Presentations are welcome :-) Looking forward to meet you ! -- Best wishes, Wei Wu (吴伟)
2018 May 29
0
LLVM Social - Beijing: May 19th, 2018
This is really great, thank you for getting this off the ground! -Chris > On May 28, 2018, at 9:42 PM, Leslie Zhai <lesliezhai at llvm.org.cn> wrote: > > Hi LLVM developers, > > My sincere thanks will goto Wu Wei for his great organization! > > I shared a topic " to introduce Loongson's contribution to LLVM and GCC toolchain. > > Slide: https://www.leetcode.cn/2018/05/loongson-llvm.p...
2018 May 29
0
LLVM Social - Beijing: May 19th, 2018
...n. I hope one day there is LLVM developer meeting in China :) > > >> 在 2018年05月29日 14:13, Chris Lattner 写道: >> This is really great, thank you for getting this off the ground! >> >> -Chris >> >> >>> On May 28, 2018, at 9:42 PM, Leslie Zhai <lesliezhai at llvm.org.cn> wrote: >>> >>> Hi LLVM developers, >>> >>> My sincere thanks will goto Wu Wei for his great organization! >>> >>> I shared a topic " to introduce Loongson's contribution to LLVM and GCC toolchain. >>> &gt...
2017 Dec 20
6
[GlobalISel] gen-global-isel failed to work
...t;MCTargetDesc/AVRMCTargetDesc.h"'. You'll also need to 'include >> "AVRRegisterBanks.td"' somewhere in your .td files. At the moment, your >> register banks definitions aren't being used. >> >>> On 19 Dec 2017, at 13:08, Leslie Zhai <lesliezhai at llvm.org.cn> wrote: >>> >>> Hi Daniel, >>> >>> Thanks for your response! >>> >>> >>> 在 2017年12月19日 18:53, Daniel Sanders 写道: >>>> >>>> Hi Leslie, >>>> >>>> There should be a definiti...
2018 May 29
0
LLVM Social - Beijing: May 19th, 2018
...gt;> >>> >>>> 在 2018年05月29日 14:13, Chris Lattner 写道: >>>> This is really great, thank you for getting this off the ground! >>>> >>>> -Chris >>>> >>>> >>>>> On May 28, 2018, at 9:42 PM, Leslie Zhai <lesliezhai at llvm.org.cn> wrote: >>>>> >>>>> Hi LLVM developers, >>>>> >>>>> My sincere thanks will goto Wu Wei for his great organization! >>>>> >>>>> I shared a topic " to introduce Loongson's contribution...
2017 Sep 01
2
[RFC] Adding ARC backend
..._AVR_CALL reloc, and ARC is more complex than AVR, I will learn it from binutils, also ARC related doc, then try to implement it. 发自我的iPhone ------------------ Original ------------------ From: Pete Couperus <Peter.J.Couperus at synopsys.com> Date: 周五,9月 1,2017 11:17 下午 To: Leslie Zhai <lesliezhai at llvm.org.cn>, Peter.J.Couperus at synopsys.com <Peter.J.Couperus at synopsys.com> Cc: llvm-dev at lists.llvm.org <llvm-dev at lists.llvm.org> Subject: Re: RE: [RFC] Adding ARC backend Hello Leslie, >> * Clang driver and target triple support. >great, then it is able...
2017 Apr 26
2
Buildbot clang-cmake-mips BUG?
在 2017年04月26日 16:51, Simon Dardis 写道: > Hi Leslie, > > I've been seeing those failures as well (I own those buildbots). Like yourself, I'm a bit > uncertain as to why they're occurring. I'm currently investigating. I suspect it's a case > that the build directory has gone stale. Perhaps! and buildbots cover how many LLVM Backend targets? thanks! > >
2017 Sep 19
1
Do I need to modify the AddrLoc of LLD for ARC target?
...No idea whether this is the cause of the problem or whether you have fixed this up in the meantime. I recommend that you take a closer look at your changes to the generic parts of lld first to see if you have inadvertently changed something. Peter On 19 September 2017 at 04:28, Leslie Zhai <lesliezhai at llvm.org.cn> wrote: > Hi Peter, > > Thanks for your kind response! > > > 在 2017年09月18日 20:44, Peter Smith 写道: >> >> Hello Leslie, >> >> I don't know quite what to say as I don't know precisely what your >> question is? If I am not being...
2017 Dec 15
8
Register Allocation Graph Coloring algorithm and Others
Hi GCC and LLVM developers, I am learning Register Allocation algorithms and I am clear that: * Unlimited VirtReg (pseudo) -> limited or fixed or alias[1] PhysReg (hard) * Memory (20 - 100 cycles) is expensive than Register (1 cycle), but it has to spill code when PhysReg is unavailable * Folding spill code into instructions, handling register coallescing, splitting live ranges, doing
2017 Sep 18
1
Do I need to modify the AddrLoc of LLD for ARC target?
...s producing a file that doesn't strictly conform to ELF here as the sh_addr of the .text OutputSection is 0 modulo sh_addralign (4). In practice it probably wouldn't make much difference. My preference is for LLD's behaviour here. Peter On 18 September 2017 at 03:28, Leslie Zhai <lesliezhai at llvm.org.cn> wrote: > Hi Peter, > > Map file about LD for ARC target > https://drive.google.com/open?id=0ByE8c-y74l_uRWpQdUh2c0VXZ1k > > LLD for ARC https://drive.google.com/open?id=0ByE8c-y74l_ueGVuYkR0a3RSWjQ > > > arm-thumb-undefined-weak.s > https://github.co...
2017 Sep 01
2
[RFC] Adding ARC backend
Hi Pete, > https://reviews.llvm.org/D36331 Congratulations! > Following shortly: > * Clang driver and target triple support. great, then it is able to generate ELF by $ /opt/llvm-svn/bin/clang -c --target=arc hello.c -o hello.o -mmcu=XXX and do you plan to implement ARC target for lld[1]? it is a good testcase: flash them directly to the chip[2], or simulator[3]. 1. ARC
2017 Dec 19
3
Register Allocation Graph Coloring algorithm and Others
...mates of loop frequencies. https://anarch128.org/~mclark/rv8-slides.pdf https://rv8.io/bench We’ve still got a long way to go to get to ~1:1 performance for RISC-V on x86-64, but I think it is possible, at least for some codes… Regards, Michael. > On 15/12/2017, at 4:18 PM, Leslie Zhai <lesliezhai at llvm.org.cn> wrote: > > Hi GCC and LLVM developers, > > I am learning Register Allocation algorithms and I am clear that: > > * Unlimited VirtReg (pseudo) -> limited or fixed or alias[1] PhysReg (hard) > > * Memory (20 - 100 cycles) is expensive than Register (1...
2017 Sep 14
4
Do I need to modify the AddrLoc of LLD for ARC target?
Hello Leslie, I think we are going to need to know a bit more about the ELF ABI for what looks like the ArcCompact before we can help you. LLD's calculation of P (the place to be relocated) is as it is in the generic ELF specification. The Rel.Offset corresponds to the ELF r_offset field. This is covered by: "For a relocatable file, the value is the byte offset from the beginning of the