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On the document about writing an LLVM backend, I became to wonder what the 'virtual register' is in the following statement. "You also need to define register classes to contain these registers, such as the integer register class and floating-point register class, so that you can allocate virtual registers to instructions from these sets, and let the target-independent register

...ev] Is there someone tried LLVM 2.1 on Visual Studio 2005? >To: "LLVM Developers Mailing List" <llvmdev at cs.uiuc.edu> > >I'm sorry but did you use Vista Platform SDK or just compile under Vista? > >Xi > >On Fri, Feb 22, 2008 at 1:53 AM, Seung Jae Lee <lee225 at uiuc.edu> wrote: >> I use VS2005/Vista, which works well... >> >> Thx, >> Seung >_______________________________________________ >LLVM Developers mailing list >LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu >http://lists.cs.uiuc.edu/mailman/listinfo...

On 19/07/2007 01:29:18, Seung Jae Lee (lee225 at uiuc.edu) wrote: > Somebody in this dev-list alreday did it with LLVM. I guess you are speaking about Bruno Cardoso Lopes ? I can see there is a MIPS implementation in LLVM repository but it looks like uncomplete (that is, I'm not even sure it can compile any source). What I hope is...

...te response. I've tried some more cases to make this issue) As Prof.Adve mentioned, I need to explain exactly what my problem is, but I have no good ability that I can explain it in this plain text space. For this reason, I made a .pdf file and linked it as follows: https://netfiles.uiuc.edu/lee225/www/MakingLoops.pdf Would you please explain to me how I can access to this problem in a better way if you can figure out? Once again, I really appreciate your time and favor, Bill and Prof.Adve. Truly yours, Seung J. Lee ---- Original message ---- >Date: Mon, 28 Jan 2008 09:39:52 -0600 &gt...

Can you recommend any good book or reference for backend implementation? I skimmed some compiler books but it seemed to be more about front-end, parsing, optimization etc. Would you mind suggesting some books containing more about backend? Thank you.

try here: http://sourceforge.net/projects/inger this project have a ebook (Compiler Construction: A Practical Approach) that covers some backend code generation techniques. On 2/1/07, Seung Jae Lee <lee225 at uiuc.edu> wrote: > Can you recommend any good book or reference for backend implementation? I skimmed some compiler books but it seemed to be more about front-end, parsing, optimization etc. > Would you mind suggesting some books containing more about backend? > Thank you. > _____...

On 19/07/2007 01:29:18, Seung Jae Lee (lee225 at uiuc.edu) wrote: > Somebody in this dev-list alreday did it with LLVM. I guess you are speaking about Bruno Cardoso Lopes ? I can see there is a MIPS implementation in LLVM repository but it looks like uncomplete (that is, I'm not even sure it can compile any source). What I hope is...

I use VS2005/Vista, which works well... Thx, Seung ---- Original message ---- >Date: Wed, 20 Feb 2008 12:02:29 +0800 >From: "Xi Wang" <xi.wang at gmail.com> >Subject: Re: [LLVMdev] Is there someone tried LLVM 2.1 on Visual Studio 2005? >To: "LLVM Developers Mailing List" <llvmdev at cs.uiuc.edu> > >Hi there, > >Did anyone try

...> make this issue) > > As Prof.Adve mentioned, I need to explain exactly what my problem > is, but I have no good ability that I can explain it in this plain > text space. > > For this reason, I made a .pdf file and linked it as follows: > > https://netfiles.uiuc.edu/lee225/www/MakingLoops.pdf > > Would you please explain to me how I can access to this problem in > a better way if you can figure out? > > Once again, I really appreciate your time and favor, Bill and > Prof.Adve. > > Truly yours, > Seung J. Lee > > > ---- Original...

Hi Hidle, 2007/7/19, Hlide <hlide at free.fr>: > > On 19/07/2007 01:29:18, Seung Jae Lee (lee225 at uiuc.edu) wrote: > > Somebody in this dev-list alreday did it with LLVM. > > I guess you are speaking about Bruno Cardoso Lopes ? I can see there is > a MIPS implementation in LLVM repository but it looks like uncomplete > (that is, I'm not even sure it can compile any sou...

Hello. My name is Seung Jae Lee. I'd like to ask you onething about converting to ARM assembly code. I saved the simplest C code shown in your LLVM webpage as 'hello.c' And I made 'hello.bc' by "$ llvm-gcc hello.c -o hello". In order to make ARM assembly code, I typed "llc -march=arm hello.bc -o hello.arm" But, I met this error. llc: ARMISelDAGToDAG.cpp:73:

Hello, guys. I just tested -reg2mem pass to see how it changes my bitcode. E.g., for the following simple C code: ------------------------------------------------------------- int foo() { int i,j; int sum = 0; for (i=0; i<10; i++) { sum += i; for (j=0; j<3; j++) sum += 2; } return sum; } ------------------------------------------------------------- I could get the

#include <stdio.h> int main() { printf("hello world\n"); return 0; } “$ llvm-gcc hello.c -o hello” “$ llc -march=arm hello.bc -o hello.arm" made error as follows: llc: ARMISelDAGToDAG.cpp:73: llvm::SDOperand LowerCALL(llvm::SDOperand, llvm::SelectionDAG&): Assertion `isVarArg == false && "VarArg not supported"' failed.

Thank you, Mr. Criswell. It actually worked but now this tblgen cannot find 'TargetSchedule.td' which is in the folder where 'Target.td' is in, as follows: Included from ARM.td:18: Parsing ../Target.td:121: Could not find include file 'TargetSchedule.td'! The location of 'Intrinsics.td' is different from that of 'Target.td'. How can I deal with this in

Hello. I am making a LLVM backend for a new architecture XCC. During implementation of instructions for XCC, I found that there are instructions need more than 3 operands in the target language manual. I could implement insructions need 1, 2 or 3 operands thanks to the examples in the LLVM backends already offered by you guys. But, I am not sure about those kind of instructions needs many number

Hello. I am Seung Jae Lee making a LLVM backend for a new architecture XCC. I found that the instructions use variable names which actually used in the source coding for operands unlike most architectures which use usually register names or addresses as operands. LLVM backend examples such as ARM, SPARC seem to use register names or addresses for operands. How can I implement this on my backend?

Dear Mr. Cheng: Thank you for kind information. Can you tell me in more detail about that? For example, I am trying to implement 'demultiplex' instruction as follows: demultiplex <multiplexid,choose,branch0id,branch1id,…,otherwisebranchid> In this case, the number of branch#id is not definite. It can be 1, 2, 3...or any number. My question was about this. I am still not sure how

Dear Mr. Lattner: Thank you for kind information. I am still a little confused, though. In your example, %X = add int %Y, %Z is generated to add EAX, EBX I think EAX and EBX are the register names of X86. But, I should emit variable names instead of register names. For my example in the source code, int k; k = i + j; should be emit like this: reg k add i,j;k (If

Dear Mr. Lattner: You have asked me how my instruction set works. If I code like this: int foo1() { int x1,x2; x1 =1; x2 = foo2(x1); return x2; } int foo2(int k) { if(k == 1) k = 2; return k; } int main () { int j; j = foo1(); } This should be emitted like this: Enter foo1; reg x2, x1 add 1;x1 Call foo2;x1,x2 Exit foo1; x2

I'd like to implement "reg" instruction on my new architecture. This is kinda pseudo instruction do not generate hardware directly but make hardware to be generated indirectly. If I code a simple function like this: void sum(int i, int j) { int k; k = i + j; } On the assembly mnemonics, it should be shown as follows: Enter sum; reg k add i,j;k Exit sum; I haven't