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...sext to the following: define i64 @foo(i32* nocapture readonly %a) #0 { entry: %0 = load i32* %a, align 4, !tbaa !1 %conv = sext i32 %0 to i64 %mul = mul nsw i64 %conv, 1405 ret i64 %mul } This promotion itself looks fine to me if nsw is true, and the final code becomes: ldrsw x8, [x0] movz w9, #0x57d mul x0, x8, x9 ret The results is different from a 32-bit mul then sext, at least for my testcase. Without nsw, ExtLdPromotion() didn't change anything, and the result is correct. Any thoughts would be helpful. Re...

On 11 January 2017 at 10:24, Jim Grosbach via llvm-dev <llvm-dev at lists.llvm.org> wrote: > ARM64 is like this. I suggest having a look at that backend (lib/Target/AArch64) and how it deals with implicit zeroing of the upper bits of the X registers. ARM64 has a separate name for the registers as 32-bit values though (W0-W30 rather than X0-X30). I could easily see DAG ISel throwing a fit

...p, #144] // 8-byte Folded Spill stp x24, x23, [sp, #160] // 8-byte Folded Spill stp x22, x21, [sp, #176] // 8-byte Folded Spill stp x20, x19, [sp, #192] // 8-byte Folded Spill stp x29, x30, [sp, #208] // 8-byte Folded Spill ldrsw x8, [x0, #4424] sxtw x10, w2 <------------- w2 is the use of spilled value before spill. sxtw x12, w1 madd x8, x8, x10, x12 ldr x9, [x0, #8] add x9, x9, x8, lsl #2 ldrh w11, [x9] ldrh w10,...

...stp x24, x23, [sp, #160] // 8-byte Folded Spill > > stp x22, x21, [sp, #176] // 8-byte Folded Spill > > stp x20, x19, [sp, #192] // 8-byte Folded Spill > > stp x29, x30, [sp, #208] // 8-byte Folded Spill > > ldrsw x8, [x0, #4424] > > sxtw x10, w2 <------------- w2 is the > use of spilled value before spill. > > sxtw x12, w1 > > madd x8, x8, x10, x12 > > ldr x9, [x0, #8] > > add x9, x9, x8,...

...p, #144] // 8-byte Folded Spill stp x24, x23, [sp, #160] // 8-byte Folded Spill stp x22, x21, [sp, #176] // 8-byte Folded Spill stp x20, x19, [sp, #192] // 8-byte Folded Spill stp x29, x30, [sp, #208] // 8-byte Folded Spill ldrsw x8, [x0, #4424] sxtw x10, w2 <------------- w2 is the use of spilled value before spill. sxtw x12, w1 madd x8, x8, x10, x12 ldr x9, [x0, #8] add x9, x9, x8, lsl #2 ldrh w11, [x9] ldrh w10,...

...// 8-byte Folded Spill > > > > stp x22, x21, [sp, #176] // 8-byte Folded Spill > > > > stp x20, x19, [sp, #192] // 8-byte Folded Spill > > > > stp x29, x30, [sp, #208] // 8-byte Folded Spill > > > > ldrsw x8, [x0, #4424] > > > > sxtw x10, w2 <------------- w2 is the > > use of spilled value before spill. > > > > sxtw x12, w1 > > > > madd x8, x8, x10, x12 > > > > ldr x9, [x0, #8...