search for: lc1

All ? I have an example data frame x lc1 id 43.38812035 85 ga1 47.55710661 85 ga1 47.55710661 85 ga2 47.55710661 85 ga2 51.99211429 85 ga3 51.99211429 85 ga3 51.99211429 95 ga1 54.78449958 95 ga1 54.78449958 95 ga2 54.78449958 95 ga2 56.70201864 95 ga3 56.70201864 95 ga3 56.70201864 105 ga1 59.66361903 105 ga1 59.66361903 105 ga2 61.69573...

...ttr(d1, 'members') + attr(d2, 'members') attr(ans, 'members') <- members attr(ans, 'height') <- height attr(ans, 'leaf') <- F attr(ans, 'midpoint') <- (members - 1)/2 attr(ans, 'class') <- 'dendrogram' ans } lc1 <- dendro.leaf('c1') lc2 <- dendro.leaf('c2') lc3 <- dendro.leaf('c3') nc1 <- dendro.merge(lc1, lc2, 0.1) nc2 <- dendro.merge(nc1, lc3, 0.2) plot(nc2) lr1 <- dendro.leaf('r1') lr2 <- dendro.leaf('r2') lr3 <- dendro.leaf('r3')...

While generating a libcall from floating point comparison, it always assumes that the return type of those libcalls is i32. Why not allow Targets to provide the correct return type? EVT RetVT = MVT::i32; // <-- here SDValue Ops[2] = { LHSInt, RHSInt }; NewLHS = MakeLibCall(LC1, RetVT, Ops, 2, false/*sign irrelevant*/, dl); NewRHS = DAG.getConstant(0, RetVT); CCCode = TLI.getCmpLibcallCC(LC1); I suggest to have a hook TLI.getCmpLibcallRT() on the lines of TLI.getCmpLibcallCC() Does that sound okay? - Sanjiv

...d to use getSetCCInverse() ? Also when I look at the code of TargetLowering::softenSetCCOperands I see that for some condition code it uses getSetCCInverse() and also I am not able to understand the way it groups condition code in switch case for example : case ISD::SETEQ: case ISD::SETOEQ: LC1 = (VT == MVT::f32) ? RTLIB::OEQ_F32 : (VT == MVT::f64) ? RTLIB::OEQ_F64 : RTLIB::OEQ_F128; break; case ISD::SETNE: case ISD::SETUNE: LC1 = (VT == MVT::f32) ? RTLIB::UNE_F32 : (VT == MVT::f64) ? RTLIB::UNE_F64 : RTLIB::UNE_F128; break; here why SETNE and SETUNE is...

Hello, I'm looking at compiling some pieces of the standard library with llvm but I'm running into problems with some functions being renamed by dragonegg. For example, when I compile the acos implementation with plain gcc I get: $ nm acos.o 0000000000000000 r .LC1 0000000000000048 r .LC10 0000000000000050 r .LC11 0000000000000058 r .LC12 0000000000000060 r .LC13 0000000000000068 r .LC14 0000000000000070 r .LC15 0000000000000008 r .LC2 0000000000000010 r .LC3 0000000000000018 r .LC4 0000000000000020 r .LC5 0000000000000028 r .LC6 0000000000000030 r .LC7 00000...

...leal 71(%r14), %eax xorl %ecx, %ecx cmpl $56, %eax movl $92, %ebx cmovnel %ecx, %ebx leaq L_.str(%rip), %rdi callq _puts leal 71(%rbx,%r14), %eax popq %rbx popq %r14 popq %rbp retq and the gcc one: pushq %rbp movl $0, %eax movl $92, %ebp pushq %rbx leal 71(%rdi), %ebx leaq LC1(%rip), %rdi subq $8, %rsp cmpl $56, %ebx cmovne %eax, %ebp call _puts addq $8, %rsp leal 0(%rbp,%rbx), %eax popq %rbx popq %rbp ret As we can see, llvm makes poor register allocations (ecx and r14), leading to more instructions for the same result. Are there some optimizations I can brin...

...ware loops and thus did not have + * register constraints for declaring clobbers. + */ +# define BFIN_HWLOOP0_REGS +# define BFIN_HWLOOP1_REGS +#else +# define BFIN_HWLOOP0_REGS , "LB0", "LT0", "LC0" +# define BFIN_HWLOOP1_REGS , "LB1", "LT1", "LC1" +#endif diff --git a/libspeex/cb_search_bfin.h b/libspeex/cb_search_bfin.h index ae9cf83..edb1eca 100644 --- a/libspeex/cb_search_bfin.h +++ b/libspeex/cb_search_bfin.h @@ -33,6 +33,8 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +#include "bfin.h" + #de...

...hen I look at the code of > TargetLowering::softenSetCCOperands I see that for some condition code it > uses > getSetCCInverse() and also I am not able to understand the way it groups > condition code in switch case for example : > case ISD::SETEQ: > case ISD::SETOEQ: > LC1 = (VT == MVT::f32) ? RTLIB::OEQ_F32 : > (VT == MVT::f64) ? RTLIB::OEQ_F64 : RTLIB::OEQ_F128; > break; > case ISD::SETNE: > case ISD::SETUNE: > LC1 = (VT == MVT::f32) ? RTLIB::UNE_F32 : > (VT == MVT::f64) ? RTLIB::UNE_F64 : RTLIB::UNE_F128; >...

...floating point comparison, it always > assumes that the return type of those libcalls is i32. > Why not allow Targets to provide the correct return type? > > EVT RetVT = MVT::i32; // <-- here > > > SDValue Ops[2] = { LHSInt, RHSInt }; > NewLHS = MakeLibCall(LC1, RetVT, Ops, 2, false/*sign irrelevant*/, dl); > NewRHS = DAG.getConstant(0, RetVT); > CCCode = TLI.getCmpLibcallCC(LC1); > > > I suggest to have a hook TLI.getCmpLibcallRT() on the lines of > TLI.getCmpLibcallCC() > > Does that sound okay? I think it should just us...

Hi, I am trying to assemble a preety simple program, but the assembler is giving parse errors: =========================== %.LC0 = internal constant [17 x sbyte] c"Hello World %d \0A\00" %.LC1 = internal constant [17 x sbyte] c"yyyyyyyyyyyyyyy\0a\00" declare int "puts"(sbyte*) int "main"() { %cast1 = getelementptr [17 x sbyte]* %.LC0, long 0, long 0 %cast2 = getelementptr [17 x sbyte]* %.LC1, long 0, long 0 %result = seteq int 5, 6 br bool %result, la...

On Mon, Feb 23, 2015 at 2:17 PM, Hal Finkel <hfinkel at anl.gov> wrote: > ----- Original Message ----- > > From: "Francois Pichet" <pichet2000 at gmail.com> > > To: "LLVM Developers Mailing List" <llvmdev at cs.uiuc.edu> > > Sent: Sunday, February 22, 2015 5:34:11 PM > > Subject: [LLVMdev] Question about shouldMergeGEPs in

...t;> condition code it uses >> getSetCCInverse() and also I am not able to understand the >> way it groups >> condition code in switch case for example : >> case ISD::SETEQ: >> case ISD::SETOEQ: >> LC1 = (VT == MVT::f32) ? RTLIB::OEQ_F32 : >> (VT == MVT::f64) ? RTLIB::OEQ_F64 : RTLIB::OEQ_F128; >> break; >> case ISD::SETNE: >> case ISD::SETUNE: >> LC1 = (VT == MVT::f32) ? RTLIB::UNE_F32 : >>...

Hi, I am using the package "demography" from Rob Hyndman for the Lee-Carter-Model. It is an amazing powerful tool but I am struggling with one issue: I want to compute different percentiles of the survival probability distribution derived from the Lee-Carter-Forecast (e.g. the 50%tile, 60%tile, 75%tile and 99%tile) for each of the next 10 years. Is there any possibility to retrieve

...gory, > I'm looking at compiling some pieces of the standard library with llvm but I'm > running into problems with some functions being renamed by dragonegg. For > example, when I compile the acos implementation with plain gcc I get: > > $ nm acos.o > 0000000000000000 r .LC1 > 0000000000000048 r .LC10 > 0000000000000050 r .LC11 > 0000000000000058 r .LC12 > 0000000000000060 r .LC13 > 0000000000000068 r .LC14 > 0000000000000070 r .LC15 > 0000000000000008 r .LC2 > 0000000000000010 r .LC3 > 0000000000000018 r .LC4 > 0000000000000020 r .LC5 &gt...

...omain) */usr/sbin/xm usb-attach $Domain $DevId $PortNumber $BusId* (Attach the USB bus-id found in step 1 to the hub created in step 2) On the domU the lsusb looks like this after the above (before it returns nothing) * mgaca:~ # lsusb Bus 001 Device 002: ID 04e6:5116 SCM Microsystems, Inc. SCR331-LC1 SmartCard Reader Bus 001 Device 001: ID 1d6b:0002 Linux Foundation 2.0 root hub* Once I have done this I can use the usb devce in the domU as if it was directly connected. Thanks for your time. Tom Parker Canadian Bank Note Company, Ltd. tparker@cbnco.com ______________________________________...

....s":651 Syntax Error in : LOOP_BEGIN entries_loopR4=; syntax error is at or near text '='. Attempting error recovery by ignoring text until the ';' [Error ea5004] "C:\Users\coder\AppData\Local\Temp\acc22e8547f000\acc22e8547f001.s":656 Syntax Error in : LOOP vq_loopR4= LC1 = P1; syntax error is at or near text '='. Attempting error recovery by ignoring text until the ';' [Error ea5004] "C:\Users\coder\AppData\Local\Temp\acc22e8547f000\acc22e8547f001.s":657 Syntax Error in : LOOP_BEGIN vq_loopR4=; syntax error is at or near text '='....

Hi All I have a symmetric matrix of genes ( 100x100 matrix). I also have a matrix (100x2) of two columns where column 1 has the gene names and column 2 has the cluster it belongs to (they are sorted and grouped based on the cluster no). I would like to order the rows and columns of the 100x 100 matrix such that the first n genes correspond to cluster 1 and next n genes correspond to cluster 2

...br />šššššššššpopq %rbp<br />šššššššššretq<br /><br />šand the gcc one:<br /><br />ššššššššpushq %rbp<br />šššššššššmovl $0, %eax<br />šššššššššmovl $92, %ebp<br />šššššššššpushq %rbx<br />šššššššššleal 71(%rdi), %ebx<br />šššššššššleaq LC1(%rip), %rdi<br />šššššššššsubq $8, %rsp<br />šššššššššcmpl $56, %ebx<br />šššššššššcmovne %eax, %ebp<br />šššššššššcall _puts<br />šššššššššaddq $8, %rsp<br />šššššššššleal 0(%rbp,%rbx), %eax<br />šššššššššpopq %rbx<br />šššššššššpopq %rbp<br />...

...of this question, you can assume HexagonMachineScheduler.cpp == MachineScheduler.cpp and VLIWMachineScheduler == ScheduleDAGMI The instruction being moved is a simple call: let isCall = 1, neverHasSideEffects = 1, Defs = [D0, D1, D2, D3, D4, D5, D6, D7, R28, R31, P0, P1, P2, P3, LC0, LC1, SA0, SA1, USR] in { def CALLv3 : JInst<(outs), (ins calltarget:$dst), "call $dst", []>, Requires<[HasV3T]>; } CALLv3 <ga:@printf>, %D0<imp-def,dead>, %D1<imp-def,dead>, %D2<imp-def,dead>, %R31<imp-def>, %R0<imp-use,kill>, .....

...an > irrelevant reason, so to stick with the code you generated, we have: > > .LBB0_1: # %for.body > # =>This Inner Loop Header: > Depth=1 > slw 8, 5, 4 > ld 9, .LC1 at toc@l(7) > addi 5, 5, 4 > add 8, 8, 6 > extsw 8, 8 > sldi 8, 8, 2 > lwzx 8, 9, 8 > addi 9, 3, 16 > stw 8, 0(3) > mr 3, 9 > bdnz .LBB0_1 > > there are two things wrong here, first: > > ld 9, .LC1 at toc@l(7) > > this load is loop invariant...