search for: l3e

...nfiguration changes from a default source installation. The first problem I encountered is that it appears the code assumes the guest to be in PAE mode. In particular, guest_walk_tables() in xen/arch/x86/mm/shadow/multi.c, line 252 has this code snippet: #else /* PAE only... */ /* Get l3e from the cache of the guest''s top level table */ gw->l3e = (guest_l3e_t *)&v->arch.shadow.gl3e[guest_l3_table_offset(va)]; #endif /* PAE or 64... */ Which accesses the L3 entries fro the shadow page tables. When I instrument this code, I get l3e to be 0 as shown below...

In p2m.c (line 197 and line 550), the code assumes the number of L3 P2M table entries is 8 (under PAE mode). According to Intel and AMD specs, it is 4. Could someone explain this discrepancy? Is it a bug? -Wei _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel

...ser info on the older machines shows no discrepancies. The RequireSignOrSeal mod has ofcourse been done. I'm running a backports samba (3.0.14a-2woody1) from backports.org on a debian machine (2.6.6 kernel). All the clients are winxp sp2. Any help would be most appreciated. Evert-Jan Duindam L3E Dynamics C.V. St. Aagtenstraat 26 2312 CB Leiden The Netherlands tel: +31-(0)715141990 fax: +31-(0)715141981 gsm: +31-(0)625092990 Bank: 345640861 tnv L3E Dynamics te Leiden IBAN: NL47 RABO0345640861 SWIFT: RABONL2U Giro: 3998348 tnv L3E Dynamics te Leiden BTW nr: NL124877266B01 KVK nr: 28089759

...amp;ctxt[cpu]) ) - maddr = page_array[maddr >> PAGE_SHIFT] << PAGE_SHIFT; + maddr = (uint64_t)page_array[maddr >> PAGE_SHIFT] << PAGE_SHIFT; return maddr; } @@ -225,7 +222,8 @@ map_domain_va_pae( void *guest_va, int perm) { - unsigned long l3e, l2e, l1e, l2p, l1p, p, va = (unsigned long)guest_va; + uint64_t l3e, l2e, l1e, l2p, l1p, p; + unsigned long va = (unsigned long)guest_va; uint64_t *l3, *l2, *l1; static void *v[MAX_VIRT_CPUS]; @@ -380,12 +378,12 @@ map_domain_va( if (!paging_enabled(&ctxt[cpu])) {...

...According to sp->u.sh.type, (like SH_type_l1_32_shadow ......), get each entry (shadow_l1e_get_flags) of the page table. Changes the flags to read only and then write the page table entry back (shadow_set_l1e). When going through the page table, I can use SHADOW_FOREACH_L1E (L2E, L3E, L4E) macro. However, I have one question. When dealing with shadow page table L2, L3, L4, can I use the same way as L1 page table to change flags and set flags ? } } Do you think my idea is possible? Thanks for giving me some suggestions. Best, Ming

2011/7/19 Stefano Stabellini <stefano.stabellini@eu.citrix.com>: > CC''ing Tim and xen-devel > > On Mon, 18 Jul 2011, Jiageng Yu wrote: >> 2011/7/16 Stefano Stabellini <stefano.stabellini@eu.citrix.com>: >> > On Fri, 15 Jul 2011, Jiageng Yu wrote: >> >> 2011/7/15 Jiageng Yu <yujiageng734@gmail.com>: >> >> > 2011/7/15

This patch series restores the use of superpages when restoring or migrating a VM, while retaining efficient batching of 4k pages when superpages are not appropriate or available. Signed-off-by: George Dunlap <george.dunlap@eu.citrix.com> _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel

From: Zhang Xiantao <xiantao.zhang@intel.com> With virtual EPT support, L1 hyerpvisor can use EPT hardware for L2 guest''s memory virtualization. In this way, L2 guest''s performance can be improved sharply. According to our testing, some benchmarks can show > 5x performance gain. Signed-off-by: Zhang Xiantao <xiantao.zhang@intel.com> Zhang Xiantao (11):

Populate-on-demand: Check pages being returned by the balloon driver This patch series is the second result of my work last summer on decreasing fragmentation of superpages in a guests'' p2m when using populate-on-demand. This patch series is against 4.1; I''m posting it to get feedback on the viability of getting a ported version of this patch into 4.2. As with the previous

Hi all, this patch series makes the necessary changes to make sure that the current ARM hypercall ABI can be used as-is on 64 bit ARM platforms: - it defines xen_ulong_t as uint64_t on ARM; - it introduces a new macro to handle guest pointers, called XEN_GUEST_HANDLE_PARAM (that has size 4 bytes on aarch and is going to have size 8 bytes on aarch64); - it replaces all the occurrences of

Hi all, this patch series makes the necessary changes to make sure that the current ARM hypercall ABI can be used as-is on 64 bit ARM platforms: - it defines xen_ulong_t as uint64_t on ARM; - it introduces a new macro to handle guest pointers, called XEN_GUEST_HANDLE_PARAM (that has size 4 bytes on aarch and is going to have size 8 bytes on aarch64); - it replaces all the occurrences of

The KVM introspection subsystem provides a facility for applications running on the host or in a separate VM, to control the execution of other VM-s (pause, resume, shutdown), query the state of the vCPUs (GPRs, MSRs etc.), alter the page access bits in the shadow page tables (only for the hardware backed ones, eg. Intel's EPT) and receive notifications when events of interest have taken place

The KVM introspection subsystem provides a facility for applications running on the host or in a separate VM, to control the execution of other VM-s (pause, resume, shutdown), query the state of the vCPUs (GPRs, MSRs etc.), alter the page access bits in the shadow page tables (only for the hardware backed ones, eg. Intel's EPT) and receive notifications when events of interest have taken place

depends on "autoconf: regenerate configure scripts with 4.4 version" This series removes some of the really old deadwood from the tools build and makes some other things which are on their way out configurable at build time with a default depending on how far down the slope I judge them to be. * nuke in tree copy of libaio * nuke obsolete tools: xsview, miniterm, lomount & sv *