Displaying 20 results from an estimated 42 matches for "l1d".
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2020 Feb 28
1
kvm presenting wrong CPU Topology for cache
...M guest CPU Topology
This is KVM host - http://paste.openstack.org/show/790120/
This is KVM guest - http://paste.openstack.org/show/790121/
If you carefully observe output of both host and guest you can see
guest machine threads has own cache that is very strange
L2 L#0 (4096KB) + Core L#0
L1d L#0 (32KB) + L1i L#0 (32KB) + PU L#0 (P#0)
L1d L#1 (32KB) + L1i L#1 (32KB) + PU L#1 (P#1)
I believe because of that my erlang doesn't understand topology and
going crazy..
I have Ali Cloud and AWS and when i compare with them they are showing
correct CPU Topology the way physical machin...
2018 Aug 29
1
Panic / EL6 / KVM / kernel-2.6.32-754.2.1.el6.x86_64
Am 29.08.2018 um 23:46 schrieb Stephen John Smoogen <smooge at gmail.com>:
>
> On Wed, 29 Aug 2018 at 17:41, Leon Fauster via CentOS <centos at centos.org> wrote:
>> Since the update from kernel-2.6.32-754.2.1.el6.x86_64
>> to kernel-2.6.32-754.3.5.el6.x86_64 I can not boot my
>> KVM guests anymore!? The workstation panics immediately!
>>
>> I
2017 Mar 21
0
Re: CPU Pinning Help
2012 Feb 21
3
How many virtual guest 'cpus' can a core duo 'quad' core support
...ad(s) per core: 1
Core(s) per socket: 4
CPU socket(s): 1
NUMA node(s): 1
Vendor ID: GenuineIntel
CPU family: 6
Model: 23
Stepping: 10
CPU MHz: 1998.000
BogoMIPS: 5331.76
Virtualization: VT-x
L1d cache: 32K
L1i cache: 32K
L2 cache: 2048K
NUMA node0 CPU(s): 0-3
I ask this because it occurs to me that I may have missed
something fundamental respecting the use of the initialism
CPU vice the term Cores.
--
*** E-Mail is NOT a SECURE channel...
2019 May 08
2
failed to build llvm since 25de7691a0e27c29c8d783a22373cc265571f5e9 on AMD platform
...uthenticAMD
CPU family: 21
Model: 1
Model name: AMD Opteron(TM) Processor 6276
Stepping: 2
CPU MHz: 1487.966
CPU max MHz: 2300.0000
CPU min MHz: 1400.0000
BogoMIPS: 4599.97
Virtualization: AMD-V
L1d cache: 16K
L1i cache: 64K
L2 cache: 2048K
L3 cache: 6144K
NUMA node0 CPU(s): 0-7
NUMA node1 CPU(s): 8-15
NUMA node2 CPU(s): 16-23
NUMA node3 CPU(s): 24-31
Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mc...
2019 May 09
3
failed to build llvm since 25de7691a0e27c29c8d783a22373cc265571f5e9 on AMD platform
...Model name: AMD Opteron(TM) Processor 6276
> Stepping: 2
> CPU MHz: 1487.966
> CPU max MHz: 2300.0000
> CPU min MHz: 1400.0000
> BogoMIPS: 4599.97
> Virtualization: AMD-V
> L1d cache: 16K
> L1i cache: 64K
> L2 cache: 2048K
> L3 cache: 6144K
> NUMA node0 CPU(s): 0-7
> NUMA node1 CPU(s): 8-15
> NUMA node2 CPU(s): 16-23
> NUMA node3 CPU(s): 24-31
> Flags:...
2019 May 02
2
Llvm-mca library.
...LSUnit does not attempt to predict if a load or store hits or misses the L1 cache. It only knows if an instruction “MayLoad” and/or “MayStore.” For loads, the scheduling model provides an “optimistic” load-to-use latency (which usually matches the load-to-use latency for when there is a hit in the L1D).”
Hope that helps,
-Matt
From: Shoaib Meenai <smeenai at fb.com>
Date: Thursday, May 2, 2019 at 11:34 AM
To: lorenzo chelini <l.chelini at icloud.com>, "llvm-dev at lists.llvm.org" <llvm-dev at lists.llvm.org>, Matt Davis <nullptr at fb.com>
Subject: Re: [llv...
2018 Sep 14
3
NUMA issues on virtualized hosts
...thenticAMD
CPU family: 23
Model: 1
Model name: AMD EPYC 7351 16-Core Processor
Stepping: 2
CPU MHz: 1800.000
CPU max MHz: 2400.0000
CPU min MHz: 1200.0000
BogoMIPS: 4800.05
Virtualization: AMD-V
L1d cache: 32K
L1i cache: 64K
L2 cache: 512K
L3 cache: 8192K
NUMA node0 CPU(s): 0-3,32-35
NUMA node1 CPU(s): 4-7,36-39
NUMA node2 CPU(s): 8-11,40-43
NUMA node3 CPU(s): 12-15,44-47
NUMA node4 CPU(s): 16-19,48-51
NUMA node5 CPU(s):...
2009 Dec 09
2
PCI: Not using MMCONFIG, leave system completely hung while booting Xen 3.4.1
...Architecture: i686
CPU(s): 2
Thread(s) per core: 1
Core(s) per socket: 2
CPU socket(s): 1
Vendor ID: GenuineIntel
CPU family: 15
Model: 6
Stepping: 4
CPU MHz: 1200.000
Virtualization: VT-x
L1d cache: 16K
L2 cache: 2048K
--
Avinash Singh
_______________________________________________
Xen-users mailing list
Xen-users@lists.xensource.com
http://lists.xensource.com/xen-users
2009 Dec 09
2
PCI: Not using MMCONFIG, leave system completely hung while booting Xen 3.4.1
...Architecture: i686
CPU(s): 2
Thread(s) per core: 1
Core(s) per socket: 2
CPU socket(s): 1
Vendor ID: GenuineIntel
CPU family: 15
Model: 6
Stepping: 4
CPU MHz: 1200.000
Virtualization: VT-x
L1d cache: 16K
L2 cache: 2048K
--
Avinash Singh
_______________________________________________
Xen-users mailing list
Xen-users@lists.xensource.com
http://lists.xensource.com/xen-users
2018 Sep 14
1
Re: NUMA issues on virtualized hosts
...me: AMD EPYC 7351 16-Core Processor
> > Stepping: 2
> > CPU MHz: 1800.000
> > CPU max MHz: 2400.0000
> > CPU min MHz: 1200.0000
> > BogoMIPS: 4800.05
> > Virtualization: AMD-V
> > L1d cache: 32K
> > L1i cache: 64K
> > L2 cache: 512K
> > L3 cache: 8192K
> > NUMA node0 CPU(s): 0-3,32-35
> > NUMA node1 CPU(s): 4-7,36-39
> > NUMA node2 CPU(s): 8-11,40-43
> > NUMA node3 CPU(s):...
2012 Jun 21
1
echo 0 > /proc/sys/kernel/hung_task_timeout_secs and others error, Part II
...ead(s) per core: 2
Core(s) per socket: 6
Socket(s): 2
NUMA node(s): 2
Vendor ID: GenuineIntel
CPU family: 6
Model: 44
Stepping: 2
CPU MHz: 2532.792
BogoMIPS: 5065.22
Virtualization: VT-x
L1d cache: 32K
L1i cache: 32K
L2 cache: 256K
L3 cache: 12288K
NUMA node0 CPU(s): 0,2,4,6,8,10,12,14,16,18,20,22
NUMA node1 CPU(s): 1,3,5,7,9,11,13,15,17,19,21,23
Thanks
------------------------------------------------------------------------...
2012 Jun 21
1
echo 0 > /proc/sys/kernel/hung_task_timeout_secs and others error, Part II
...ead(s) per core: 2
Core(s) per socket: 6
Socket(s): 2
NUMA node(s): 2
Vendor ID: GenuineIntel
CPU family: 6
Model: 44
Stepping: 2
CPU MHz: 2532.792
BogoMIPS: 5065.22
Virtualization: VT-x
L1d cache: 32K
L1i cache: 32K
L2 cache: 256K
L3 cache: 12288K
NUMA node0 CPU(s): 0,2,4,6,8,10,12,14,16,18,20,22
NUMA node1 CPU(s): 1,3,5,7,9,11,13,15,17,19,21,23
Thanks
------------------------------------------------------------------------...
2018 Aug 21
0
Unknown Error
...NUMA node(s):????????? 1
Vendor ID:???????????? GenuineIntel
CPU family:??????????? 6
Model:???????????????? 23
Model name:??????????? Intel(R) Core(TM)2 Quad CPU??? Q9550? @ 2.83GHz
Stepping:????????????? 10
CPU MHz:?????????????? 1998.000
BogoMIPS:????????????? 5652.96
Virtualization:??????? VT-x
L1d cache:???????????? 32K
L1i cache:???????????? 32K
L2 cache:????????????? 6144K
NUMA node0 CPU(s):???? 0-3
There were 2 parameters in the BIOS, VT-x and VT-x with Direct I/O. And
as I was told, I powered the machine off.
After restarting the machine I went to the instructions to build a
virtual...
2011 Jul 02
1
Bug#632397: xen: /proc/uptime show idle bigger than uptime
...CPU(s): 1
Thread(s) per core: 1
Core(s) per socket: 1
CPU socket(s): 1
Vendor ID: AuthenticAMD
CPU family: 6
Model: 10
Stepping: 0
CPU MHz: 2099.764
Hypervisor vendor: Xen
Virtualization type: none
L1d cache: 64K
L1i cache: 64K
L2 cache: 512K
%
This is plain x86 squeeze with 2.6.32-5-xen-686
2019 May 03
3
Llvm-mca library.
...empt to predict if a load or store hits or misses
> the L1 cache. It only knows if an instruction “MayLoad” and/or “MayStore.”
> For loads, the scheduling model provides an “optimistic” load-to-use
> latency (which usually matches the load-to-use latency for when there is a
> hit in the L1D).”
>
>
>
> Hope that helps,
>
> -Matt
>
>
>
>
>
> *From: *Shoaib Meenai <smeenai at fb.com>
> *Date: *Thursday, May 2, 2019 at 11:34 AM
> *To: *lorenzo chelini <l.chelini at icloud.com>, "llvm-dev at lists.llvm.org" <
> llvm-dev...
2018 Sep 14
0
Re: NUMA issues on virtualized hosts
...el: 1
> Model name: AMD EPYC 7351 16-Core Processor
> Stepping: 2
> CPU MHz: 1800.000
> CPU max MHz: 2400.0000
> CPU min MHz: 1200.0000
> BogoMIPS: 4800.05
> Virtualization: AMD-V
> L1d cache: 32K
> L1i cache: 64K
> L2 cache: 512K
> L3 cache: 8192K
> NUMA node0 CPU(s): 0-3,32-35
> NUMA node1 CPU(s): 4-7,36-39
> NUMA node2 CPU(s): 8-11,40-43
> NUMA node3 CPU(s): 12-15,44-47
> NUMA node4 CPU(s)...
2020 Apr 04
3
how to pick cipher for AES-NI enabled AMD GX-412TC SOC tincd at 100% CPU
...: 1
Vendor ID: AuthenticAMD
CPU family: 22
Model: 48
Model name: AMD GX-412TC SOC
Stepping: 1
CPU MHz: 775.729
CPU max MHz: 1000.0000
CPU min MHz: 600.0000
BogoMIPS: 1996.08
Virtualization: AMD-V
L1d cache: 32K
L1i cache: 32K
L2 cache: 2048K
NUMA node0 CPU(s): 0-3
Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr
pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext
fxsr_opt pdpe1gb rdtscp lm constant_tsc rep_good acc_power...
2017 Jun 29
2
Way to detect virtual machine cpu features
Hello everyone
I want to know how can I use libvirt to detect what cpu features a virtual
machine will see.
I guess I could do it in following way:
1. if cpu mode is 'custom', use 'virsh cpu-baseline --features' on the cpu
model to get model features.
2. if cpu mode is 'host-passthrough' or 'host-model', do a 'virsh
capabilities' to list cpu features of
2020 Sep 14
0
Re: [ovirt-users] Re: Testing ovirt 4.4.1 Nested KVM on Skylake-client (core i5) does not work
...t;feature policy="require" name="pdpe1gb"/>
> > <feature policy="require" name="ibpb"/>
> > <feature policy="require" name="amd-ssbd"/>
> > <feature policy="require" name="skip-l1dfl-vmentry"/>
> > <feature policy="require" name="mpx"/>
> > </cpu
>
> Thanks for the report!
>
> Would you like to open a bug about this?
>
> A possible fix is probably to pass relevant options to the
> virt-install command...