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Lu Mitnick <king19880326 at gmail.com> writes: > Hello all, > > I am adding a new target into LLVM. However there is a assembler for > that target and I just want LLVM to generate assembly. I read the > document "Writing an LLVM Backend". I am wondering to know whether I > can ignore the Ins...

...of "set" in "LLVM Language Reference Manual". Is that correspond to $dst = op $b, $c?? Would you mind to tell me whether there is a reference of all possible element of DAG?? thanks a lot yi-hong 2011/1/25 David A. Greene <greened at obbligato.org> > Lu Mitnick <king19880326 at gmail.com> writes: > > > Hello all, > > > > I am adding a new target into LLVM. However there is a assembler for > > that target and I just want LLVM to generate assembly. I read the > > document "Writing an LLVM Backend". I am wondering to know whet...

Hello all, I am adding a new target into LLVM. However there is a assembler for that target and I just want LLVM to generate assembly. I read the document "Writing an LLVM Backend". I am wondering to know whether I can ignore the Inst field in the following example: class InstSP<dag outs, dag ins, string asmstr, list<dag> pattern> : Instruction { field bits<32>

On Thu, Dec 16, 2010 at 5:42 PM, Lu Mitnick <king19880326 at gmail.com> wrote: > Hello all, > > I want to the do followings: > > (1) Modify the LLVM front-end(clang) to support EFI C > > (2) Add EFI Byte Code target to LLVM > > I am wondering to know which task should I do first, modify front end or > porting LLVM? > &g...

Hello Villmow, Is it your backend EFI Byte Code Virtual Machine?? Would you mind to give me an example about what pseudo instruction you add?? thanks a lot yi-hong 2011/1/19 Villmow, Micah <Micah.Villmow at amd.com> > I have this same problem in our backend. I solve it by adding a pseudo > instruction at instruction selection that transforms @R1 into R1, so only a > single

Hello all, I am a beginner of LLVM and want to add a new Target for LLVM. I follow the document (http://llvm.org/docs/WritingAnLLVMBackend.html) to modify autotools/configure.ac. However when I type ./AutoRegen.sh There is an error that "Your autoconf was not detected as being 2.60" I download the source of autoconf 2.60 and install it. And there is the other error that "Your

Hello all, I want to the do followings: (1) Modify the LLVM front-end(clang) to support EFI C (2) Add EFI Byte Code target to LLVM I am wondering to know which task should I do first, modify front end or porting LLVM? thanks yi-hong -------------- next part -------------- An HTML attachment was scrubbed... URL:

Hello, I recently try to modify the front end of LLVM for a variation of C. The main difference between the variation and the original one is that I wish to view the "size of" as a function. Would anybody suggest me how to start doing?? thanks yi-hong -------------- next part -------------- An HTML attachment was scrubbed... URL:

Hello all, I am adding a new target into LLVM. However the instruction length of the target I ported is variable. Each instruction is at least 1 + 1 bytes(required) and optional parts(There are many forms of optional part suck like i16, i32, i64, i16 + i16, i16 + i32, i16 + i64, i32 + i32, i64 + i64). The form of optional part is determined by the required parts. In other words, each instruction

Hello all, I am an user of LLVM Interpreter. The situation I encounter is as follows: --------------------------------------------------------------------- main.c: jmp_buf buf; int main() { if (setjmp(buf) == 0) { ... } else { execute(); } } --------------------------------------------------------------------- execute.c: execute() { EE->runFunction(Func, Args); // EE is

Hello everyone, I have noticed that there is a BoundsChecking.c under lib/Transforms/Instrumentation/. I am wondering how to use this tool and which type of bugs it targets. Are the tool provide the same functionality with Address Aanitizer? Thanks a lot -------------- next part -------------- An HTML attachment was scrubbed... URL:

Hello Jakob, Is this means that TableGen execution is handled in Makefile. Porting programmer doesn't need to execute TableGen by hand? thanks 2011/3/10 Jakob Stoklund Olesen <stoklund at 2pi.dk> > > On Mar 9, 2011, at 2:13 PM, Lu Mitnick wrote: > > > Hello all, > > > > I have some question about usage of TableGen when adding a new LLVM > Backend. There

Hello all, I download the src of llvm 2.8 and run ./autoconf/AutoRegen.sh However there is a little difference between origin configure file and the generated one $diff configure configure.bak 1394c1394 < --enable-optimized Compile with optimizations enabled (default is YES) --- > --enable-optimized Compile with optimizations enabled (default is NO) I am wondering to know

Hello all, I have developed a instrumented pass which insert some variables between the original variables, as well as insert some code into the original source code. just like: ============= original source code ============= int a[10]; void fun1 () { // some source code here } ========================================= ============= instrumented source code ============= int

Hello all, I have some question about usage of TableGen when adding a new LLVM Backend. There are three place to use TableGen in basic steps of document "Writing an LLVM Compiler Backend": 2. Describe the register set of the target. Use "TableGen" to generate code for register definition, register aliases, and register classes from a target-specific RegisterInfo.td input

Hello all, I have read the chapter "Writing an LLVM Pass" and noticed that there is a topic "Multithreaded LLVM". However I have no idea about this. I am wondering to know whether the goal of this extension is: 1. Multiple threads handle different modules (Thread : Module = 1 : 1) or 2. Multiple threads handle one module (Thread : Module = N : 1) Thanks a lot --------------

Hello all, I am at the adding Instruction Set stage of adding new target support into LLVM. There is a single instruction op mnemonic with multiple operand forms. For example: Add R1, R2 & Add @R1, R2. I found that there is similar case in x86 instruction set, such like ADD reg, reg & ADD mem, reg. However, the solution of x86 is adding suffix of instruction and translating instruction op

Hello all, I am using LLVM/Clang 3.5 to build a C++ extension. Such C++ extension contains a special function named "barrier", which shouldn't be duplicated. So I add __attribute__((noduplicate)) on barrier declaration. For some reasons, I also add AlwaysInlineAttr attribute on each function except main function. The generated LLVM IR what I expect is only a main function with many

Hello all, I am a LLVM newer who want to add a new backend(EBC) into LLVM. After coping the related files from another target and modifying it, I meet a problem when I build the project. The error message is as follows: ================================================================ [ 94%] Built target llvm-dis Linking CXX executable ../../bin/llvm-mc Undefined symbols:

Hello all, I am a LLVM newer who want to add a new backend(EBC) into LLVM. After coping the related files from another target and modifying it, I meet a problem when I build the project. The error message is as follows: ================================================================ [ 94%] Built target llvm-dis Linking CXX executable ../../bin/llvm-mc Undefined symbols: