search for: jiongxi

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2013 Jan 29
3
[PATCH v4 2/2] Xen: Fix VMCS setting for x2APIC mode guest while enabling APICV
...on" and "virtual-interrupt deliver" VM-execution control has no effect on the behavior of RDMSR/WRMSR if the "virtualize x2APIC mode" VM-execution control is 0. When guest uses x2APIC mode, we should enable "virtualize x2APIC mode" for APICV first. Signed-off-by: Jiongxi Li <jiongxi.li@intel.com> diff --git a/xen/arch/x86/hvm/vmx/vmcs.c b/xen/arch/x86/hvm/vmx/vmcs.c index de22e03..4807eb2 100644 --- a/xen/arch/x86/hvm/vmx/vmcs.c +++ b/xen/arch/x86/hvm/vmx/vmcs.c @@ -190,7 +190,8 @@ static int vmx_init_vmcs_config(void) */ if ( _vmx_cpu_bas...
2013 Jan 29
1
[PATCH v4 1/2] Xen: Fix live migration while enabling APICV
SVI should be restored in case guest is processing virtual interrupt while saveing a domain state. Otherwise SVI would be missed when virtual interrupt delivery is enabled. Signed-off-by: Jiongxi Li <jiongxi.li@intel.com> diff --git a/xen/arch/x86/hvm/vlapic.c b/xen/arch/x86/hvm/vlapic.c index ee2294c..38ff216 100644 --- a/xen/arch/x86/hvm/vlapic.c +++ b/xen/arch/x86/hvm/vlapic.c @@ -1198,6 +1198,9 @@ static int lapic_load_regs(struct domain *d, hvm_domain_context_t *h) if ( hvm...
2012 Sep 14
0
[ PATCH v3 2/3] xen: enable Virtual-interrupt delivery
...he approach here is to manipulate EOI exit bitmap based on value of TMR. Level triggered irq requires a hook in vLAPIC EOI write, so that vIOAPIC EOI is triggered and emulated Signed-off-by: Gang Wei <gang.wei@intel.com> Signed-off-by: Yang Zhang <yang.z.zhang@intel.com> Signed-off-by: Jiongxi Li <jiongxi.li@intel.com> diff -r 7c6844dd4a0d xen/arch/x86/hvm/vlapic.c --- a/xen/arch/x86/hvm/vlapic.c Tue Sep 11 15:34:36 2012 +0800 +++ b/xen/arch/x86/hvm/vlapic.c Fri Sep 14 09:16:35 2012 +0800 @@ -145,6 +145,9 @@ int vlapic_set_irq(struct vlapic *vlapic if ( trig ) vlapi...
2012 Aug 31
0
[ PATCH 0/2] xen: enable APIC-Register Virtualization and Virtual-interrupt delivery
The VMCS includes controls that enable the virtualization of interrupts and the Advanced Programmable Interrupt Controller (APIC). When these controls are used, the processor will emulate many accesses to the APIC, track the state of the virtual APIC, and deliver virtual interrupts - all in VMX non-root operation without a VM exit. You can refer to Chapter 29 of the latest SDM. This series of
2013 Jan 26
0
[Patch 0/2] bug fixes for APICV
This patchset fixes some APICV issues, including a potential issue while doing live migration and enabling APICV while guest is in X2APIC mode. PATCH 1/2: Xen: Fix live migration while enabling APICV. PATCH 2/2: Xen: Fix VMCS setting for x2APIC mode guest while enabling APICV.