search for: istarget

Displaying 17 results from an estimated 17 matches for "istarget".

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2013 Feb 07
1
[LLVMdev] How to set isTarget bit for a complex intrinsic class in tblgen?
...StrOp, [(IntOP)]>; def INT_MEMBAR_CTA : MEMBAR<"membar.cta;", int_nvvm_membar_cta>; def INT_MEMBAR_GL : MEMBAR<"membar.gl;", int_nvvm_membar_gl>; def INT_MEMBAR_SYS : MEMBAR<"membar.sys;", int_nvvm_membar_sys>; Question: how to set an isTarget bit to the Intrinsic subclass of it? In simple cases that would be let isTarget = 1 in { ... } How to make the same here? Thanks, - D. -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20130207/d7f2c883/attac...
2009 Apr 15
0
[LLVMdev] Error w/ Tablegen + Intrinsics
Are you using isTarget = 1 in your intrinsics file? On Apr 14, 2009, at 6:34 PM, Villmow, Micah wrote: > It seems that Tablegen is generating intrinsic ID’s off by in > DAGISel.inc > > In DAGISel.inc, I have the following pattern: > int64_t CN1 = Tmp0->getZExtValue(); > > // Pattern: (int...
2011 Dec 08
0
[LLVMdev] PTX builtin functions.
On Thu, Dec 8, 2011 at 11:36 AM, Villmow, Micah <Micah.Villmow at amd.com>wrote: > It is my understanding that all you need to do is specify let isTarget = > 1 in your .td file and it will generate target specific intrinsics. This > should allow you to keep the IntrinsicsPTX.td file in the same location. > So we keep the intrinsics defined in include/llvm/IntrinsicsPTX.td? How do we then get at the generated files in the PTXIntrinsicInfo...
2014 Jul 17
2
[LLVMdev] Fwd: Re: [PATCH] [TABLEGEN] Do not crash on intrinsics with names longer than 40 characters
...alueType<int size, int value> { + string Namespace = "MVT"; + int Size = size; + int Value = value; +} + +class LLVMType<ValueType vt> { + ValueType VT = vt; +} + +class Intrinsic<string name, list<LLVMType> param_types = []> { + string LLVMName = name; + bit isTarget = 0; + string TargetPrefix = ""; + list<LLVMType> RetTypes = []; + list<LLVMType> ParamTypes = param_types; + list<IntrinsicProperty> Properties = []; +} + +def iAny : ValueType<0, 254>; +def llvm_anyint_ty : LLVMType<iAny>; + +// Make sure we generate th...
2009 Apr 15
2
[LLVMdev] Error w/ Tablegen + Intrinsics
It seems that Tablegen is generating intrinsic ID's off by in DAGISel.inc In DAGISel.inc, I have the following pattern: int64_t CN1 = Tmp0->getZExtValue(); // Pattern: (intrinsic_w_chain:f32 103:iPTR, GPRF32:f32:$src0, GPRF32:f32:$src1, GPRF32:f32:$src2) // Emits: (MACRO_FMA_f32:f32 GPRF32:f32:$src0, GPRF32:f32:$src1, GPRF32:f32:$src2) // Pattern complexity = 8 cost
2011 Dec 08
3
[LLVMdev] PTX builtin functions.
It is my understanding that all you need to do is specify let isTarget = 1 in your .td file and it will generate target specific intrinsics. This should allow you to keep the IntrinsicsPTX.td file in the same location. Micah From: Justin Holewinski [mailto:justin.holewinski at gmail.com] Sent: Monday, December 05, 2011 6:13 AM To: Alberto Magni Cc: Villmow, Micah; L...
2014 Jul 17
2
[LLVMdev] Fwd: Re: [PATCH] [TABLEGEN] Do not crash on intrinsics with names longer than 40 characters
...size; >> + int Value = value; >> +} >> + >> +class LLVMType<ValueType vt> { >> + ValueType VT = vt; >> +} >> + >> +class Intrinsic<string name, list<LLVMType> param_types = []> { >> + string LLVMName = name; >> + bit isTarget = 0; >> + string TargetPrefix = ""; >> + list<LLVMType> RetTypes = []; >> + list<LLVMType> ParamTypes = param_types; >> + list<IntrinsicProperty> Properties = []; >> +} >> + >> +def iAny : ValueType<0, 254>; >> +d...
2013 Feb 07
1
[LLVMdev] [llvm-tblgen] Two issues: crash case and mysterious double-inclusion case
Hi Sean, Thank you, great catch! Strange, how I missed it with grep... However, this means question 1) becomes more interesting, because it is now clear intrinsics table is included in there, but somehow llvm-lblgen crashes. Best, - D. 2013/2/7 Sean Silva <silvas at purdue.edu> > > On Wed, Feb 6, 2013 at 5:47 PM, Dmitry Mikushin <dmitry at kernelgen.org>wrote: >>
2013 Mar 29
2
[LLVMdev] [cfe-dev] Handling SRet on Windows x86
....ru>: >> How can having an MSVC compatible compiler be to the detriment of clang and >> llvm? No one is trying to break mingw here, merely add support for something > Just to make stuff clear: I just wanted proper naming which will be > non-confusing. Right now we have: > - isTargetWindows() which really means "msvc-compabile" > - isTargetWin32() which means "everything on windows", so Windows + > Mingw + Cygwin Minor correction: currently isTargetWin32 means 32-bits (not "everything"), Windows + Mingw, not Cygwin. So this is actually even...
2010 Apr 10
0
[LLVMdev] darwin dragon-egg build issues
Hi Jack, > Is anyone building dragon-egg on darwin? Anton built it once. There were some problems with dynamic libraries: gcc's plugin support requires the use of dynamic libraries, and the configure logic it uses thinks that darwin does not support dynamic libraries! So it is possible that plugin support was automatically disabled because of this. Try configuring with
2010 Apr 11
7
[LLVMdev] darwin dragon-egg build issues
...ort.exp =================================================================== --- gcc/testsuite/lib/plugin-support.exp (revision 158195) +++ gcc/testsuite/lib/plugin-support.exp (working copy) @@ -88,6 +88,10 @@ set optstr "$includes $extra_flags -DIN_GCC -fPIC -shared" + if { [ istarget *-*-darwin* ] } { + set optstr [concat $optstr "-undefined dynamic_lookup"] + } + # Temporarily switch to the environment for the plugin compiler. restore_ld_library_path_env_vars set status [remote_exec build "$PLUGINCC $PLUGINCFLAGS $plugin_src $optstr -o $...
2013 Dec 17
3
[LLVMdev] Trying to use patchpoint in MCJIT
Hi all, I'm trying to play with patchoint (with MCJIT and VMKit) and I don't understand something. I generate this call for my first patch point. Basically, I want to call f(0). %5 = call i64 (i64, i32, i8*, i32, ...)* @llvm.experimental.patchpoint.i64( i64 42, ;; patch point id is 42 i32 0, ;; 0 bytes for the padding i8* bitcast (i32 (i32)* @f to i8*), ;; my function f i32 1,
2010 Apr 11
0
[LLVMdev] darwin dragon-egg build issues
On 04/10/2010 08:01 PM, Jack Howarth wrote: > > bash-3.2$ GCC=/sw/bin/gcc-4 CC=gcc-4 CXX=g++-4 CFLAGS=-I/sw/include CXXFLAGS=-I/sw/include LLVM_CONFIG=/sw/lib/llvm/bin/llvm-config make > g++-4 -c -I/sw/lib/llvm/include -D_DEBUG -D_GNU_SOURCE -D__STDC_LIMIT_MACROS -D__STDC_CONSTANT_MACROS -MD -MP -DIN_GCC -DREVISION=\"100954M\"
2010 Apr 10
3
[LLVMdev] darwin dragon-egg build issues
Is anyone building dragon-egg on darwin? I am trying to build against the fink gcc45 package that I have prepared for darwin and a updated fink llvm 2.7 package that is built as... ../llvm-2.7/configure --prefix=/sw --prefix=/sw/lib/llvm --mandir=/sw/share/man --infodir=/sw/share/info --with-gmp=/sw --with-libiconv-prefix=/usr --with-system-zlib --with-as=/Developer/usr/bin/as
2011 Dec 05
0
[LLVMdev] PTX builtin functions.
On Sun, Dec 4, 2011 at 1:10 PM, Alberto Magni <alberto.magni86 at gmail.com>wrote: > Hi Justin, > > sorry for the delay, I have been busy. > > Micah's proposal requires to move the definitions of the intrinsics > from include/llvm/IntrinsicsPTX.td to lib/Target/PTX/PTXIntrinsics.td > thus allowing the generation of the file PTXGenIntrinsics.inc which > will be
2011 Dec 04
2
[LLVMdev] PTX builtin functions.
Hi Justin, sorry for the delay, I have been busy. Micah's proposal requires to move the definitions of the intrinsics from include/llvm/IntrinsicsPTX.td to lib/Target/PTX/PTXIntrinsics.td thus allowing the generation of the file PTXGenIntrinsics.inc which will be included by PTXIntrinsicInfo.cpp. This is a quite big modification, do you agree with this ? Or do you have a better solution.
2012 Jul 16
3
[LLVMdev] RFC: LLVM incubation, or requirements for committing new backends
...----------------------------------------------------------===// > +// > +// This file defines intrinsics that are used by all hw codegen targets. > +// > +//===----------------------------------------------------------------------===// > + > +let TargetPrefix = "AMDGPU", isTarget = 1 in { > + > + def int_AMDGPU_load_const : Intrinsic<[llvm_float_ty], [llvm_i32_ty], [IntrNoMem]>; > + def int_AMDGPU_load_imm : Intrinsic<[llvm_v4f32_ty], [llvm_i32_ty], [IntrNoMem]>; > + def int_AMDGPU_reserve_reg : Intrinsic<[], [llvm_i32_ty], [IntrNoMem]>; &gt...