search for: ispic

Displaying 9 results from an estimated 9 matches for "ispic".

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2008 Apr 16
3
[LLVMdev] Being able to know the jitted code-size before emitting
...t;> -unsigned X86RegisterInfo::getX86RegNum(unsigned RegNo) const { >> +unsigned X86RegisterInfo::getX86RegNum(unsigned RegNo) { >> > > What happened to "const"? > I made the function static. >> + unsigned Size = GetInstSizeWithDesc(*MI, &Desc, IsPIC, >> Is64BitMode); >> + if (Desc.getOpcode() == X86::MOVPC32r) { >> + Size += GetInstSizeWithDesc(*MI, &get(X86::POP32r), IsPIC, >> Is64BitMode); >> + } >> > > I would prefer this special case is handled in GetInstSizeWithDesc(). > &gt...
2008 Apr 16
0
[LLVMdev] Being able to know the jitted code-size before emitting
...RegNum(unsigned RegNo) const { >>> +unsigned X86RegisterInfo::getX86RegNum(unsigned RegNo) { >>> >> >> What happened to "const"? >> > > I made the function static. Ok. > > >>> + unsigned Size = GetInstSizeWithDesc(*MI, &Desc, IsPIC, >>> Is64BitMode); >>> + if (Desc.getOpcode() == X86::MOVPC32r) { >>> + Size += GetInstSizeWithDesc(*MI, &get(X86::POP32r), IsPIC, >>> Is64BitMode); >>> + } >>> >> >> I would prefer this special case is handled in GetInstS...
2009 Jun 03
5
[LLVMdev] patch for llc/ARM: added mechanism to move switch tables from .text -> .data; also cleanup and documentation
...JumpTarget = DAG.getLoad(PTy, dl, Chain, TabEntryAddr, NULL, 0); + + return DAG.getNode(ARMISD::BR_JT, dl, MVT::Other, Chain, JumpTarget, JTI, UId); +} + + +static SDValue LowerBR_JT_Inline(SDValue Op, + SelectionDAG &DAG, + bool isPIC, + MVT PTy) { + // The Jumptable idiom we are aiming for looks somthing like this: + // + // .set PCRELV0, (.LJTI9_0_0-(.LPCRELL0+8)) + // .LPCRELL0: + // add r3, pc, #PCRELV0 + // ldr pc, [r3, +r0, lsl #2] + // .LJTI9_0_0: + //...
2008 Apr 16
0
[LLVMdev] Being able to know the jitted code-size before emitting
...Size += sizeJumpTableAddress(false); > + } else { > + assert(0 && "Unknown value to relocate!"); > + } > + return FinalSize; > +} > + > +static unsigned sizeMemModRMByte(const MachineInstr &MI, unsigned Op, > + bool IsPIC, bool Is64BitMode) { getMemModRMByteSize()? > > + const MachineOperand &Op3 = MI.getOperand(Op+3); > + int DispVal = 0; > + const MachineOperand *DispForReloc = 0; > + unsigned FinalSize = 0; > + > + // Figure out what sort of displacement we have to handle here. &gt...
2008 Apr 15
4
[LLVMdev] Being able to know the jitted code-size before emitting
OK, here's a new patch that adds the infrastructure and the implementation for X86, ARM and PPC of GetInstSize and GetFunctionSize. Both functions are virtual functions defined in TargetInstrInfo.h. For X86, I moved some commodity functions from X86CodeEmitter to X86InstrInfo. What do you think? Nicolas Evan Cheng wrote: > > I think both of these belong to TargetInstrInfo. And
2009 Jun 11
0
[LLVMdev] patch for llc/ARM: added mechanism to move switch tables from .text -> .data; also cleanup and documentation
On Jun 8, 2009, at 2:42 PM, robert muth wrote: > On Sun, Jun 7, 2009 at 11:53 PM, Evan Cheng <evan.cheng at apple.com> > wrote: >> >> On Jun 7, 2009, at 6:59 AM, robert muth wrote: >> >>> On Sat, Jun 6, 2009 at 4:51 PM, Evan Cheng<evan.cheng at apple.com> >>> wrote: >>>> +cl::opt<std::string>
2009 Jun 08
2
[LLVMdev] patch for llc/ARM: added mechanism to move switch tables from .text -> .data; also cleanup and documentation
On Sun, Jun 7, 2009 at 11:53 PM, Evan Cheng <evan.cheng at apple.com> wrote: > > On Jun 7, 2009, at 6:59 AM, robert muth wrote: > >> On Sat, Jun 6, 2009 at 4:51 PM, Evan Cheng<evan.cheng at apple.com> >> wrote: >>> +cl::opt<std::string> FlagJumpTableSection("jumptable-section", >>> +                                          
2009 Jun 24
2
[LLVMdev] patch for llc/ARM: added mechanism to move switch tables from .text -> .data; also cleanup and documentation
...JumpTarget = DAG.getLoad(PTy, dl, Chain, TabEntryAddr, NULL, 0); + + return DAG.getNode(ARMISD::BR_JT, dl, MVT::Other, Chain, JumpTarget, JTI, UId); +} + + +static SDValue LowerBR_JT_Inline(SDValue Op, + SelectionDAG &DAG, + bool isPIC, + MVT PTy) { + // The Jumptable idiom we are aiming for looks somthing like this: + // + // .set PCRELV0, (.LJTI9_0_0-(.LPCRELL0+8)) + // .LPCRELL0: + // add r3, pc, #PCRELV0 + // ldr pc, [r3, +r0, lsl #2] + // .LJTI9_0_0: + //...
2008 Apr 17
1
[LLVMdev] Being able to know the jitted code-size before emitting
...d RegNo) { >>>> >>>> >>> What happened to "const"? >>> >>> >> I made the function static. >> > > Ok. > > >> >>>> + unsigned Size = GetInstSizeWithDesc(*MI, &Desc, IsPIC, >>>> Is64BitMode); >>>> + if (Desc.getOpcode() == X86::MOVPC32r) { >>>> + Size += GetInstSizeWithDesc(*MI, &get(X86::POP32r), IsPIC, >>>> Is64BitMode); >>>> + } >>>> >>>> >>> I would pr...