Displaying 2 results from an estimated 2 matches for "isinlineimm".
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isinlineasm
2015 Oct 24
2
[AMDGPU] AMDGPUAsmParser fails to parse several instructions
...at to do the work-around. To me the modifier is set when
the register has absolute or negate. I traced the code and thought that the
problem occurs in the for loop to empty the modifiers for each source (in
the AMDGPUAsmParser::parseOperand around line 1040). If I add an if
statement like
if(RegOp.isInlineImm()) // because 0.5 is this case
contiune;
before the statement to empty the modifier (RegOp.setModifiers(0);),
it obvious does not work and cause the other matching fails. Does it mean
to modify other files in other places, such as the VOP3Inst in the
SIInstrInfo.td, or is this nothing to do w...
2015 Oct 23
3
[AMDGPU] AMDGPUAsmParser fails to parse several instructions
Dear Developers,
I compile a OpenCL kernel, FFT, in AMDAPP SDK v2.5 using clang 3.8 + libclc
and assembling the code with lld (The LLVM linker). The assembly code
contains the following assembly codes (and lots of other similar format
assembly) that fails to be parsed by AMDGPUAsmParser. It seems to me that
both are valid instructions after looking at the SI instruction spec.
s_mov_b32 s0,