Displaying 20 results from an estimated 78 matches for "irreversibly".
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irreversible
2006 Apr 06
3
Irreversible Migrations
Hi,
To make a migration irreversable, one has to execute "raise
IrreversibleMigration". This is how it''s documented everywhere. However,
when I do that, I get this:
rake aborted!
uninitialized constant IrreversibleMigration
This is the migration (the file is called 022_ldap_fix.rb):
class LdapFix < ActiveRecord::Migration
def self.up
execute File.open(
2007 Apr 12
7
Looking for a good disk exerciser
I recently added a Seagate 400Gb SATA drive to my system, and it has been
behaving strangely since I put it in. for one thing, the BIOS S.M.A.R.T.
came up with a warning the last time I booted with it enabled, saying that I
should backup my data and replace the disk (!).
I still have not made any irreversible data transfers to this drive, and I
have some time yet to take it back, but I'd
2015 Jun 17
8
[Bug 11338] New: Rsync Crash - Segmentation fault
https://bugzilla.samba.org/show_bug.cgi?id=11338
Bug ID: 11338
Summary: Rsync Crash - Segmentation fault
Product: rsync
Version: 3.1.1
Hardware: x64
OS: Linux
Status: NEW
Severity: normal
Priority: P5
Component: core
Assignee: wayned at samba.org
Reporter:
2008 Apr 13
4
Replay-gain
...an tell my player to ignore the settings or I can even use foobar2000 to remove the tags entirely, hence getting back to the original audio.
If that is the case, why is there a warning in the foobar2000 converter dialogue box stating that "applying ReplayGain adjustment during conversion will irreversibly alter data in encoded file, unlike ReplayGain scan after encode"?
I used EAC and AutoFLAC to rip my CD collection. In the EAC command line options for flac.exe, I added the --replay-gain parameter and in the AutoFLAC setup, I enabled the "Add Replaygain" checkbox. I just downloade...
2016 Mar 23
3
Need help with code generation
On Tue, Mar 22, 2016 at 10:33 PM, David Blaikie <dblaikie at gmail.com> wrote:
>
>
> On Tue, Mar 22, 2016 at 1:29 PM, Rui Ueyama <ruiu at google.com> wrote:
>
>> On Tue, Mar 22, 2016 at 9:19 PM, David Blaikie <dblaikie at gmail.com>
>> wrote:
>>
>>>
>>>
>>> On Tue, Mar 22, 2016 at 1:15 PM, Rui Ueyama <ruiu at
2008 Apr 15
0
Replay-gain
On Sun, Apr 13, 2008 at 02:10:51AM -0500, Charles Velasquez wrote:
> If that is the case, why is there a warning in the foobar2000
> converter dialogue box stating that "applying ReplayGain adjustment
> during conversion will irreversibly alter data in encoded file,
> unlike ReplayGain scan after encode"?
ReplayGain, as the name implies, works by calculating a scaling-factor
that should be used during playback. In flac the original audio
data is left unalterred; tags are used to store the ReplayGain
values.
I haven't u...
2016 Mar 23
0
Need help with code generation
On Wed, Mar 23, 2016 at 3:52 AM, Rui Ueyama <ruiu at google.com> wrote:
> On Tue, Mar 22, 2016 at 10:33 PM, David Blaikie <dblaikie at gmail.com>
> wrote:
>
>>
>>
>> On Tue, Mar 22, 2016 at 1:29 PM, Rui Ueyama <ruiu at google.com> wrote:
>>
>>> On Tue, Mar 22, 2016 at 9:19 PM, David Blaikie <dblaikie at gmail.com>
>>>
2019 Sep 17
2
[PATCH 03/11] drm/nouveau: secboot: Read WPR configuration from GPU registers
...fine TEGRA_MC_SECURITY_CARVEOUT_CFG_LOCKED (1 << 1)
> /**
> * gm20b_secboot_tegra_read_wpr() - read the WPR registers on Tegra
> *
> - * On dGPU, we can manage the WPR region ourselves, but on Tegra the WPR region
> - * is reserved from system memory by the bootloader and irreversibly locked.
> - * This function reads the address and size of the pre-configured WPR region.
> + * On dGPU, we can manage the WPR region ourselves, but on Tegra this region
> + * is allocated from system memory by the secure firmware. The region is then
> + * marked as a "secure carveo...
2010 Feb 05
4
Compressing Maildir mails on delivery
Now supported by v2.0. Also as a patch to v1.2:
http://dovecot.org/patches/1.2/zlib-compress.diff
I'm not really sure if I should commit it to v1.2 code tree. The code
contains ugly copy&pasted io_stream_copy() and v1.2 is supposed to be
feature complete..
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2007 Feb 20
4
Best way to implement syntax sugar?
Hi!
I''m *very* new to rails, I just dove in about a month ago and I''m
loving it.
One thing I decided I immediately wanted to do, was shorten the
number of keystrokes neccessary to URI, HTML, or Jscript encode something.
The project I''ve come into already has helpers defined for this.
Right now, what I''ve done is:
alias h! string_esacpe_html
alias u!
2013 Apr 16
7
[Bug 9798] New: rsync crash with SIGSEGV when read time out happens
https://bugzilla.samba.org/show_bug.cgi?id=9798
Summary: rsync crash with SIGSEGV when read time out happens
Product: rsync
Version: 3.0.2
Platform: All
OS/Version: All
Status: NEW
Severity: critical
Priority: P5
Component: core
AssignedTo: wayned at samba.org
ReportedBy: vijunag at
2016 Oct 28
0
Understanding and Cleaning Up Machine Instruction Bundles
On 10/27/2016 4:33 PM, Matthias Braun via llvm-dev wrote:
>
> In fact I am not sure why you would even wait with the finalization and do it
> in a separate pass rather than doing it immediately after forming the bundle.
> Using the pass today does not even work as the MachineVerifier will reject the
> intermediate unfinalized state (missing internal read markers). I'd suggest to
2004 Nov 17
1
Re: variations on the theme of survSplit
Danardono <daodao99 at student.umu.se> wrote:
>
> While waiting for 2.1, for those who need function[s] for this
> survival-splitting business, as I do, this 'survcut' function below
> might be helpful.
> It is not an elegant nor efficient function but it works, at least for
> some examples below.
>
Ditto the following, for the case where there are multiple
2018 Dec 04
2
MatchLoadCombine(): handling for vectorized loop.
Hi Eli,
On 2018-12-04 00:37, Friedman, Eli wrote:
> On 12/3/2018 8:20 AM, Jonas Paulsson wrote:
>> Hi,
>>
>> I have noticed some loops that build a wider element by loading small
>> elements, zero-extending them, shifting them (with different amounts)
>> to then 'or' them all together. They are either equivalent of a wider
>> load, or to that of a
2019 Sep 16
0
[PATCH 03/11] drm/nouveau: secboot: Read WPR configuration from GPU registers
...OUT2_SIZE_128K 0xc64
-#define TEGRA_MC_SECURITY_CARVEOUT_CFG_LOCKED (1 << 1)
/**
* gm20b_secboot_tegra_read_wpr() - read the WPR registers on Tegra
*
- * On dGPU, we can manage the WPR region ourselves, but on Tegra the WPR region
- * is reserved from system memory by the bootloader and irreversibly locked.
- * This function reads the address and size of the pre-configured WPR region.
+ * On dGPU, we can manage the WPR region ourselves, but on Tegra this region
+ * is allocated from system memory by the secure firmware. The region is then
+ * marked as a "secure carveout" and irrever...
2013 Dec 06
1
[LLVMdev] [RFC] CGContext skeleton implementation
On Thu, Dec 5, 2013 at 7:36 PM, Andrew Trick <atrick at apple.com> wrote:
> It might nice if scalaropts did not need to link against libTarget—we
> could easily avoid introducing more dependence on libTarget if that’s a
> goal.
>
We already have that state today in the overwhelming majority of the cases.
The pass manager built by the PassManagerBuilder doesn't need a target
2020 Apr 08
2
Questions about vscale
On Wed, 8 Apr 2020 at 04:23, Kai Wang <kai.wang at sifive.com> wrote:
> If we apply the type system pointed out by Renato, is the vector type <vscale x 1 x i16> legal? If we decide that <vscale x 1 x i16> is a fundamentally impossible type, does it contrary to the philosophy of LLVM IR as reasonably target-independent IR? I do not get the point of your argument.
Hi Kai,
2020 Jan 15
2
[PITCH] Improvements to LLVM Decision Making
On 01/15, James Henderson via llvm-dev wrote:
> One other thought: any formal review period needs to be long enough for
> people to contribute to if they have any annual leave from work or
> whatever. For example, if the review period were to be set to two weeks,
> I'd have missed proposals made at the start of roughly 2-3 different 2 week
> periods last year. It would have been
2019 Sep 17
0
[PATCH 03/11] drm/nouveau: secboot: Read WPR configuration from GPU registers
...RVEOUT_CFG_LOCKED (1 << 1)
> > /**
> > * gm20b_secboot_tegra_read_wpr() - read the WPR registers on Tegra
> > *
> > - * On dGPU, we can manage the WPR region ourselves, but on Tegra the WPR region
> > - * is reserved from system memory by the bootloader and irreversibly locked.
> > - * This function reads the address and size of the pre-configured WPR region.
> > + * On dGPU, we can manage the WPR region ourselves, but on Tegra this region
> > + * is allocated from system memory by the secure firmware. The region is then
> > + * marked as a...
2019 Sep 11
2
Load combine pass
Hi,
Can I ask what is the status of load widening. It seems there is no load
widening on IR at all.
// Paweł
On Wed, Oct 5, 2016 at 1:49 PM Artur Pilipenko via llvm-dev <
llvm-dev at lists.llvm.org> wrote:
> Philip and I talked about this is person. Given the fact that load
> widening in presence of atomics is irreversible transformation we agreed
> that we don't want to do