search for: intop

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2013 Mar 01
4
[LLVMdev] NVPTX CUDA_ERROR_NO_BINARY_FOR_GPU
I'm building this with llvm-c, and accessing these intrinsics via calling the intrinsic as if it were a function. class F_SREG<string OpStr, NVPTXRegClass regclassOut, Intrinsic IntOp> : NVPTXInst<(outs regclassOut:$dst), (ins), OpStr, [(set regclassOut:$dst, (IntOp))]>; def INT_PTX_SREG_TID_X : F_SREG<"mov.u32 \t$dst, %tid.x;", Int32Regs, int_nvvm_read_ptx_sreg_tid_x>; This method of accessing intrinsics works just fine...
2013 Feb 07
1
[LLVMdev] How to set isTarget bit for a complex intrinsic class in tblgen?
Dear all, Let's say there is some complex tblgen intrinsic definition, for example: class MEMBAR<string StrOp, Intrinsic IntOP> : NVPTXInst<(outs), (ins), StrOp, [(IntOP)]>; def INT_MEMBAR_CTA : MEMBAR<"membar.cta;", int_nvvm_membar_cta>; def INT_MEMBAR_GL : MEMBAR<"membar.gl;", int_nvvm_membar_gl>; def INT_MEMBAR_SYS : MEMBAR<"membar.sys;",...
2013 Mar 01
0
[LLVMdev] NVPTX CUDA_ERROR_NO_BINARY_FOR_GPU
...rs from working examples, for instance, nvptx regression tests. ----- Original message ----- > I'm building this with llvm-c, and accessing these intrinsics via calling > the intrinsic as if it were a function. > > class F_SREG<string OpStr, NVPTXRegClass regclassOut, Intrinsic IntOp> : >            NVPTXInst<(outs regclassOut:$dst), (ins), >                              OpStr, >                  [(set regclassOut:$dst, (IntOp))]>; > > def INT_PTX_SREG_TID_X : F_SREG<"mov.u32 \t$dst, %tid.x;", Int32Regs, >    int_nvvm_read_ptx_sreg_t...
2013 Mar 01
0
[LLVMdev] NVPTX CUDA_ERROR_NO_BINARY_FOR_GPU
...te On Fri, Mar 1, 2013 at 11:51 AM, Timothy Baldridge <tbaldridge at gmail.com> wrote: > I'm building this with llvm-c, and accessing these intrinsics via calling > the intrinsic as if it were a function. > > class F_SREG<string OpStr, NVPTXRegClass regclassOut, Intrinsic IntOp> : > NVPTXInst<(outs regclassOut:$dst), (ins), > OpStr, > [(set regclassOut:$dst, (IntOp))]>; > > def INT_PTX_SREG_TID_X : F_SREG<"mov.u32 \t$dst, %tid.x;", Int32Regs, > int_nvvm_read_ptx_sreg_tid_x>; > > This method o...
2005 Mar 18
3
Easy Accounting?
I have an office setup with shorewall and when there''s bandwidth problems, I''d like to know who''s hogging my bandwidth and how (port). What would be the best approach to have shorewall show me something like: IP | Port | Bytes In | Bytes Out I have 20 PCs connected via DHCP. I looked at the documentation and thought that accounting may be close, but accounting
2013 Mar 01
1
[LLVMdev] NVPTX CUDA_ERROR_NO_BINARY_FOR_GPU
...at 11:51 AM, Timothy Baldridge <tbaldridge at gmail.com> > wrote: > > I'm building this with llvm-c, and accessing these intrinsics via calling > > the intrinsic as if it were a function. > > > > class F_SREG<string OpStr, NVPTXRegClass regclassOut, Intrinsic IntOp> : > > NVPTXInst<(outs regclassOut:$dst), (ins), > > OpStr, > > [(set regclassOut:$dst, (IntOp))]>; > > > > def INT_PTX_SREG_TID_X : F_SREG<"mov.u32 \t$dst, %tid.x;", Int32Regs, > > int_nvvm_read_ptx_sreg_tid_...
2013 Mar 01
0
[LLVMdev] NVPTX CUDA_ERROR_NO_BINARY_FOR_GPU
Timothy, Those calls to compute grid intrinsics are definitely wrong. In ptx code they should end up into reading special registers, rather than function calls. Try to take some working example and figure out the LLVM IR differences between it and the result of your compiler. - D. ----- Original message ----- > I've written a compiler that outputs PTX code, the result seems fairly >
2013 Mar 01
2
[LLVMdev] NVPTX CUDA_ERROR_NO_BINARY_FOR_GPU
I've written a compiler that outputs PTX code, the result seems fairly reasonable, but I'm not sure the intrinsics are getting compiled correctly. In addition, when I try load the module using CUDA, I get an error: CUDA_ERROR_NO_BINARY_FOR_GPU. I'm running this on a 2012 MBP with a 640M GPU. PTX Code (for a mandelbrot calculation): // // Generated by LLVM NVPTX Back-End //