Displaying 3 results from an estimated 3 matches for "int_x86_sse2_mfence".
2008 Oct 17
2
[LLVMdev] MFENCE encoding
Hi,
I have a problem with creating a MFENCE on X86 with SSE
In X86InstrSSE.td, a MFENCE is
def MFENCE : I<0xAE, MRM6m, (outs), (ins),
"mfence", [(int_x86_sse2_mfence)]>, TB, Requires<
[HasSSE2]>;
In X86CodeEmitter.cpp in emitInstruction
case X86II::MRM6m: case X86II::MRM7m: {
intptr_t PCAdj = (CurOp+4 != NumOps) ?
(MI.getOperand(CurOp+4).isImm() ? X86InstrInfo::sizeOfImm
(Desc) : 4) : 0;
...
If I'm reading the code correctly, t...
2008 Oct 17
0
[LLVMdev] MFENCE encoding
...handling. I'll take a look.
Evan
On Oct 16, 2008, at 10:46 PM, Mon Ping Wang wrote:
> Hi,
>
> I have a problem with creating a MFENCE on X86 with SSE
>
> In X86InstrSSE.td, a MFENCE is
> def MFENCE : I<0xAE, MRM6m, (outs), (ins),
> "mfence", [(int_x86_sse2_mfence)]>, TB, Requires<
> [HasSSE2]>;
>
> In X86CodeEmitter.cpp in emitInstruction
>
> case X86II::MRM6m: case X86II::MRM7m: {
> intptr_t PCAdj = (CurOp+4 != NumOps) ?
> (MI.getOperand(CurOp+4).isImm() ? X86InstrInfo::sizeOfImm
> (Desc) : 4) : 0;
> ...
>...
2008 Oct 17
1
[LLVMdev] MFENCE encoding
...gt;
> On Oct 16, 2008, at 10:46 PM, Mon Ping Wang wrote:
>
>> Hi,
>>
>> I have a problem with creating a MFENCE on X86 with SSE
>>
>> In X86InstrSSE.td, a MFENCE is
>> def MFENCE : I<0xAE, MRM6m, (outs), (ins),
>> "mfence", [(int_x86_sse2_mfence)]>, TB, Requires<
>> [HasSSE2]>;
>>
>> In X86CodeEmitter.cpp in emitInstruction
>>
>> case X86II::MRM6m: case X86II::MRM7m: {
>> intptr_t PCAdj = (CurOp+4 != NumOps) ?
>> (MI.getOperand(CurOp+4).isImm() ? X86InstrInfo::sizeOfImm
>> (Des...