Displaying 4 results from an estimated 4 matches for "instr0".
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2013 Oct 08
2
[LLVMdev] Subregister liveness tracking
...ave a question about the way sub-registers are spilled and restored
> that is related to the changes I made in r192119.
>
> Suppose I have the following piece of code with four
> instructions. %vreg0 and %vreg1 consist of two sub-registers indexed
> by sub_lo and sub_hi.
>
> instr0 %vreg0<def>
> instr1 %vreg1:sub_lo<def,read-undef>
> instr2 %vreg0<use>
> instr3 %vreg1:sub_hi<def>
>
> If register allocator decides to insert spill and restore instructions
> for %vreg0, will it spill the whole register that includes
> sub-registers...
2013 Oct 08
0
[LLVMdev] Subregister liveness tracking
...have a question about the way sub-registers are spilled and restored
> that is related to the changes I made in r192119.
>
> Suppose I have the following piece of code with four
> instructions. %vreg0 and %vreg1 consist of two sub-registers indexed by
> sub_lo and sub_hi.
>
> instr0 %vreg0<def>
> instr1 %vreg1:sub_lo<def,read-undef>
> instr2 %vreg0<use>
> instr3 %vreg1:sub_hi<def>
>
> If register allocator decides to insert spill and restore instructions
> for %vreg0, will it spill the whole register that includes sub-registers lo
&...
2013 Oct 09
4
[LLVMdev] Subregister liveness tracking
...ave a question about the way sub-registers are spilled and restored that is related to the changes I made in r192119.
>>
>> Suppose I have the following piece of code with four instructions. %vreg0 and %vreg1 consist of two sub-registers indexed by sub_lo and sub_hi.
>>
>> instr0 %vreg0<def>
>> instr1 %vreg1:sub_lo<def,read-undef>
>> instr2 %vreg0<use>
>> instr3 %vreg1:sub_hi<def>
>>
>> If register allocator decides to insert spill and restore instructions for %vreg0, will it spill the whole register that includes sub-r...
2013 Oct 07
1
[LLVMdev] Subregister liveness tracking
I've been working on patches to improve subregister liveness tracking on
llvm and I wanted to inform the llvm community about the overal
design/motivation for them. I will send the patches to llvm-commits
later today.
Greetings
Matthias Braun
Subregisters in llvm
====================
Some targets can access registers in different ways resulting in wider or
narrower accesses. For