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2012 Feb 23
2
[LLVMdev] [RFC] Remat Enhancements
...a corresponding implementation in the X86 target consisting of a switch on all of the load-type opcodes. By default isLoad returns false so that false negatives are possible. - Add a writesMemory member to TargetInstrInfo with a corresponding implementation in the XD86 target. The target implemenmtation is both a switch on store-type opcodes and a check to see whether a MachineInstr has write-type MachineMemOperands. The default implementation returns "false" but "true" might be a safer default (false positives). The remat code itself identifies load instructions and...