search for: immed_nvc0

Displaying 20 results from an estimated 41 matches for "immed_nvc0".

2016 Oct 16
0
[PATCH 3/5] nvc0: rename BEGIN_IMC0 to IMMED_NVC0
...ocal.h b/src/nouveau_local.h index 3de69a2..dd49395 100644 --- a/src/nouveau_local.h +++ b/src/nouveau_local.h @@ -237,7 +237,7 @@ BEGIN_NIC0(struct nouveau_pushbuf *push, int subc, int mthd, int size) } static inline void -BEGIN_IMC0(struct nouveau_pushbuf *push, int subc, int mthd, int data) +IMMED_NVC0(struct nouveau_pushbuf *push, int subc, int mthd, int data) { PUSH_DATA (push, 0x80000000 | (data << 16) | (subc << 13) | (mthd / 4)); } -- 2.7.3
2014 May 27
1
[PATCH V3] nvc0: implement clear_buffer
...EAR_COLOR(0)), 4); + PUSH_DATAf(push, color.f[0]); + PUSH_DATAf(push, color.f[1]); + PUSH_DATAf(push, color.f[2]); + PUSH_DATAf(push, color.f[3]); + BEGIN_NVC0(push, NVC0_3D(SCREEN_SCISSOR_HORIZ), 2); + PUSH_DATA (push, width << 16); + PUSH_DATA (push, height << 16); + + IMMED_NVC0(push, NVC0_3D(RT_CONTROL), 1); + + BEGIN_NVC0(push, NVC0_3D(RT_ADDRESS_HIGH(0)), 9); + PUSH_DATAh(push, buf->address + offset); + PUSH_DATA (push, buf->address + offset); + + PUSH_DATA (push, width * data_size); + PUSH_DATA (push, height); + + PUSH_DATA (push, nvc0_format_table[ds...
2014 May 26
1
[PATCH V2] nvc0: implement clear_buffer
...PUSH_DATAf(push, color.f[0]); + PUSH_DATAf(push, color.f[1]); + PUSH_DATAf(push, color.f[2]); + PUSH_DATAf(push, color.f[3]); + BEGIN_NVC0(push, NVC0_3D(SCREEN_SCISSOR_HORIZ), 2); + PUSH_DATA (push, width << 16); + PUSH_DATA (push, height << 16); + + IMMED_NVC0(push, NVC0_3D(RT_CONTROL), 1); + + BEGIN_NVC0(push, NVC0_3D(RT_ADDRESS_HIGH(0)), 9); + PUSH_DATAh(push, buf->address + offset); + PUSH_DATA (push, buf->address + offset); + + PUSH_DATA (push, width * data_size); + PUSH_DATA (push, height); + + PUSH_DATA (push, nv...
2014 Jul 10
3
[PATCH 0/3] nvc0: ARB_(multi_)draw_indirect support
The main patches are from Christoph. Unfortunately they're a little beyond my understanding of all the vertex-related details, but they generally seemed fine. I'm just going to push these unless someone steps up to review them. Christoph Bumiller (2): nvc0: add support for indirect drawing nvc0: fix translate path for PRIM_RESTART_WITH_DRAW_ARRAYS Ilia Mirkin (1): nouveau: check if
2014 Dec 31
0
[PATCH] nv50,nvc0: set vertex id base to index_bias
...575,9 @@ nvc0_draw_arrays(struct nvc0_context *nvc0, if (nvc0->state.index_bias) { /* index_bias is implied 0 if !info->indexed (really ?) */ /* TODO: can we deactivate it for the VERTEX_BUFFER_FIRST command ? */ - PUSH_SPACE(push, 1); + PUSH_SPACE(push, 2); IMMED_NVC0(push, NVC0_3D(VB_ELEMENT_BASE), 0); + IMMED_NVC0(push, NVC0_3D(VERTEX_ID), 0); nvc0->state.index_bias = 0; } @@ -705,9 +706,11 @@ nvc0_draw_elements(struct nvc0_context *nvc0, boolean shorten, prim = nvc0_prim_gl(mode); if (index_bias != nvc0->state.index_bias) { -...
2014 Jul 01
1
[PATCH 1/2] nv50: do an explicit flush on draw when there are persistent buffers
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> --- src/gallium/drivers/nouveau/nv50/nv50_context.c | 22 ++++++++++++++++++- src/gallium/drivers/nouveau/nv50/nv50_context.h | 1 + src/gallium/drivers/nouveau/nv50/nv50_vbo.c | 29 ++++++++++++++++++++++++- 3 files changed, 50 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/nouveau/nv50/nv50_context.c
2014 May 18
0
[PATCH] nv50,nvc0: fix 3d blits with mipmap levels
...>layout_3d) { + z /= u_minify(src->depth0, l); + dz /= u_minify(src->depth0, l); + } } - dz = (float)info->src.box.depth / (float)info->dst.box.depth; - z = (float)info->src.box.z; - if (nv50_miptree(src)->layout_3d) - z += 0.5f * dz; - IMMED_NVC0(push, NVC0_3D(VIEWPORT_TRANSFORM_EN), 0); IMMED_NVC0(push, NVC0_3D(VIEW_VOLUME_CLIP_CTRL), 0x2 | NVC0_3D_VIEW_VOLUME_CLIP_CTRL_DEPTH_RANGE_0_1); -- 1.8.5.5
2015 Dec 14
6
[Bug 93373] New: sometimes hickup with persistent garbaby
https://bugs.freedesktop.org/show_bug.cgi?id=93373 Bug ID: 93373 Summary: sometimes hickup with persistent garbaby Product: xorg Version: unspecified Hardware: x86-64 (AMD64) OS: Linux (All) Status: NEW Severity: minor Priority: medium Component: Driver/nouveau Assignee:
2016 Oct 27
2
[PATCH v2 5/7] nvc0: refactor TIC uploads to allow different specifics per generation
...2,6 +322,17 @@ NVAccelInit3D_NVC0(ScrnInfoPtr pScrn) > PUSH_DATA (push, (bo->offset + MISC_OFFSET) >> 32); > PUSH_DATA (push, (bo->offset + MISC_OFFSET)); > PUSH_DATA (push, 1); > + } else { > + /* Use new TIC format. Not strictly necessary for GM20x+ */ > + IMMED_NVC0(push, SUBC_3D(0x0f10), 1); > + if (pNv->dev->chipset >= 0x120) { > + /* Use center sample locations. */ > + BEGIN_NVC0(push, SUBC_3D(0x11e0), 4); > + PUSH_DATA (push, 0x88888888); > + PUSH_DATA (push, 0x88888888); > + PUSH_DATA (push, 0x88888888); > + PUSH...
2016 Jun 05
0
[RFC PATCH] nouveau: add locking
...t;push_mutex); nouveau_context_update_frame_stats(&nvc0->base); } @@ -48,8 +50,10 @@ nvc0_texture_barrier(struct pipe_context *pipe) { struct nouveau_pushbuf *push = nvc0_context(pipe)->base.pushbuf; + pipe_mutex_lock(nvc0_context(pipe)->screen->base.push_mutex); IMMED_NVC0(push, NVC0_3D(SERIALIZE), 0); IMMED_NVC0(push, NVC0_3D(TEX_CACHE_CTL), 0); + pipe_mutex_unlock(nvc0_context(pipe)->screen->base.push_mutex); } static void @@ -59,6 +63,8 @@ nvc0_memory_barrier(struct pipe_context *pipe, unsigned flags) struct nouveau_pushbuf *push = nvc0->bas...
2014 May 26
2
Implement buffer_clear for nvc0
Hi, please review the following patch! Thanks, Tobias Klausmann
2017 Mar 13
0
[ANNOUNCE] xf86-video-nouveau 1.0.14
Ilia Mirkin (7):       exa: add GM10x acceleration support       hwdefs: update nvc0_3d, add gm107_texture for new TIC format       nvc0: make use of the new hwdefs for TEX_CB_INDEX       nvc0: rename BEGIN_IMC0 to IMMED_NVC0       nvc0: refactor TIC uploads to allow different specifics per generation       copy: add maxwell/pascal copy engine classes       recognize and accelerate GM20x Lyude (2):       Consider CRTCs disabled when DPMS is off       Bump version to 1.0.14 git tag: xf86-video-nouveau-1.0.14 https://x...
2017 Mar 13
0
[ANNOUNCE] xf86-video-nouveau 1.0.14
Ilia Mirkin (7):       exa: add GM10x acceleration support       hwdefs: update nvc0_3d, add gm107_texture for new TIC format       nvc0: make use of the new hwdefs for TEX_CB_INDEX       nvc0: rename BEGIN_IMC0 to IMMED_NVC0       nvc0: refactor TIC uploads to allow different specifics per generation       copy: add maxwell/pascal copy engine classes       recognize and accelerate GM20x Lyude (2):       Consider CRTCs disabled when DPMS is off       Bump version to 1.0.14 git tag: xf86-video-nouveau-1.0.14 https://x...
2014 Jun 14
0
[PATCH 2/3] nvc0: mark scissor in nvc0_clear_{}
...push, NVC0_3D(RT_CONTROL), 1); PUSH_DATA (push, 1); @@ -447,6 +448,7 @@ nvc0_clear_buffer(struct pipe_context *pipe, BEGIN_NVC0(push, NVC0_3D(SCREEN_SCISSOR_HORIZ), 2); PUSH_DATA (push, width << 16); PUSH_DATA (push, height << 16); + nvc0->scissors_dirty |= 1; IMMED_NVC0(push, NVC0_3D(RT_CONTROL), 1); @@ -521,6 +523,7 @@ nvc0_clear_depth_stencil(struct pipe_context *pipe, BEGIN_NVC0(push, NVC0_3D(SCREEN_SCISSOR_HORIZ), 2); PUSH_DATA (push, ( width << 16) | dstx); PUSH_DATA (push, (height << 16) | dsty); + nvc0->scissors_dirty |= 1; BEGIN_...
2016 Oct 17
2
[PATCH 4/5] nvc0: refactor TIC uploads to allow different specifies per generation
..._DATA (push, (bo->offset + MISC_OFFSET) >> 32); > PUSH_DATA (push, (bo->offset + MISC_OFFSET)); > PUSH_DATA (push, 1); > + } else { > + /* Use new TIC format. Not strictly necessary for GM20x+ */ Yes, but it's also enabled by default in mesa, looks fine. > + IMMED_NVC0(push, SUBC_3D(0x0f10), 1); > + if (pNv->dev->chipset >= 0x120) { > + /* Use center sample locations. */ > + BEGIN_NVC0(push, SUBC_3D(0x11e0), 4); > + PUSH_DATA (push, 0x88888888); > + PUSH_DATA (push, 0x88888888); > + PUSH_DATA (push, 0x88888888); > + PUSH...
2014 Dec 31
0
[PATCH 2/2] nvc0: regenerate rnndb headers
...= ((int64_t)info->src.box.width << 32) / info->dst.box.width; dv_dy = ((int64_t)info->src.box.height << 32) / info->dst.box.height; @@ -1241,13 +1241,13 @@ nvc0_blit_eng2d(struct nvc0_context *nvc0, const struct pipe_blit_info *info) if (mask != 0xffffffff) { IMMED_NVC0(push, NVC0_2D(ROP), 0xca); /* DPSDxax */ IMMED_NVC0(push, NVC0_2D(PATTERN_COLOR_FORMAT), - NVC0_2D_PATTERN_COLOR_FORMAT_32BPP); - BEGIN_NVC0(push, NVC0_2D(PATTERN_COLOR(0)), 4); + NV50_2D_PATTERN_COLOR_FORMAT_A8R8G8B8); + BEGIN_NVC0(push,...
2015 Feb 14
2
[PATCH 1/2] st/mesa: treat resource-less xfb buffers as if they weren't there
If a transform feedback buffer's size is 0, st_bufferobj_data doesn't end up creating a buffer for it. There's no point in trying to write to such a buffer, so just pretend as if it's not really there. This fixes arb_gpu_shader5-xfb-streams-without-invocations on nvc0. Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> --- src/mesa/state_tracker/st_cb_xformfb.c | 2 +- 1
2014 Mar 06
0
[PATCH] nv50, nvc0: adjust blit_3d handling of ms output textures
...lit_3d(struct nvc0_context *nvc0, const struct pipe_blit_info *info) BEGIN_NVC0(push, NVC0_3D(VTX_ATTR_DEFINE), 3); PUSH_DATA (push, 0x74200); PUSH_DATAf(push, 0.0f); - PUSH_DATAf(push, 16384 << nv50_miptree(dst)->ms_y); + PUSH_DATAf(push, y_output); IMMED_NVC0(push, NVC0_3D(VERTEX_END_GL), 0); } -- 1.8.3.2
2015 May 17
14
[PATCH 00/12] Tessellation support for nvc0
This is enough to enable tessellation support on nvc0. It seems to work a lot better on my GF108 than GK208. I suspect that there's some sort of scheduling shenanigans that need to be adjusted for kepler+. Or perhaps some shader header things. Even with the GF108, I still get occasional blue triangles in Heaven, but I get a *ton* of them on the GK208 -- seemingly the same issue, but it's
2016 Oct 27
0
[PATCH v2 5/7] nvc0: refactor TIC uploads to allow different specifics per generation
...ffset + MISC_OFFSET) >> 32); >> PUSH_DATA (push, (bo->offset + MISC_OFFSET)); >> PUSH_DATA (push, 1); >> + } else { >> + /* Use new TIC format. Not strictly necessary for GM20x+ >> */ >> + IMMED_NVC0(push, SUBC_3D(0x0f10), 1); >> + if (pNv->dev->chipset >= 0x120) { >> + /* Use center sample locations. */ >> + BEGIN_NVC0(push, SUBC_3D(0x11e0), 4); >> + PUSH_DATA (push, 0x88888888); &g...