Displaying 4 results from an estimated 4 matches for "imm12".
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imm16
2018 Jun 21
2
add new instruction format
Hi
Im trying to add RISC V Store Instruction for an Experiment on my Target.
The thing is, llvm Store Format gets Register and Pointer Type Operand.
beside this, RISC-V Store Instruction takes source Register, Base Register and offset immediate type. So this takes 3 leafs.
In this case, should I make new SelectionDAG Node in this case? or use BuildMI Instruction to add new Register?
P.S.
2013 Nov 01
8
[LLVMdev] Implementing the ldr pseudo instruction in ARM integrated assembler
...what the behavior should be and provide some tests before starting the
implementation. The FileCheck-ified tests are attached to this email. They
currently pass when using gcc to assemble the test.
Here are the specific behaviors that are checked in the test:
1. Check that constants that fit into imm12 are converted to mov
ldr r0, =0x3
2. Check that large constants are converted to ldr from constant pool
ldr r0, =0x103
3. Duplicate constants should be merged to the same constant pool location
ldr r0, =0x103
...
ldr r0, =0x103
4. A section defined in multiple pieces is merged a...
2013 Nov 01
0
[LLVMdev] Implementing the ldr pseudo instruction in ARM integrated assembler
...d provide some tests before starting the
> implementation. The FileCheck-ified tests are attached to this email. They
> currently pass when using gcc to assemble the test.
>
> Here are the specific behaviors that are checked in the test:
>
> 1. Check that constants that fit into imm12 are converted to mov
> ldr r0, =0x3
> 2. Check that large constants are converted to ldr from constant pool
> ldr r0, =0x103
> 3. Duplicate constants should be merged to the same constant pool location
> ldr r0, =0x103
> ...
> ldr r0, =0x103
> 4. A section def...
2013 Nov 11
0
[LLVMdev] Implementing the ldr pseudo instruction in ARM integrated assembler
...d provide some tests before
> starting the implementation. The FileCheck-ified tests are attached to
> this email. They currently pass when using gcc to assemble the test.
>
> Here are the specific behaviors that are checked in the test:
>
> 1. Check that constants that fit into imm12 are converted to mov
> ldr r0, =0x3
> 2. Check that large constants are converted to ldr from constant pool
> ldr r0, =0x103
> 3. Duplicate constants should be merged to the same constant pool location
> ldr r0, =0x103
> ...
> ldr r0, =0x103
> 4. A sectio...