Displaying 3 results from an estimated 3 matches for "ii16".
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i16
2013 Feb 02
1
[LLVMdev] Trouble with instructions for lowering load/store.
...Defs = [A], Uses = [BC] in
def LD8AmBC : I<0x0A, (outs), (ins),
"ld\t{a, (bc)}", [(set A, (load BC))]>;
let Defs = [A], Uses = [DE] in
def LD8AmDE : I<0x1A, (outs), (ins),
"ld\t{a, (bc)}", [(set A, (load DE))]>;
let Defs = [A] in
def LD8Am : II16<0x3A, (outs), (ins i16imm:$src),
"ld\t{a, ($src)", [(set A, (load imm:$src))]>;
}
...
GR8 - i8 RegisterClass (contains registers: A, B, C, D, E, H, L)
GR16 - i16 RegisterClas (contains registers: BC, DE, HL)
I have some questions:
1. Can I specify the register in TargetLower...
2018 Mar 28
0
x86 instruction format which takes a single 64-bit immediate
...tes that EVEX.L'L should be used for embedded rounding control
hasNoTrackPrefix - Instruction has notrack prefix. Should only occur on indirect calls and jumps.
The X86Inst class should not be used directly to define any instruction. Instructions should use PseudoI, I, Ii8, Ii8Reg, Ii8PCRecl, Ii16, Ii32, Ii32S, FPI, FPI_, Iseg16, or Iseg32 classes. Or a subclass of one of those. These classes take care of setting the ImmT field correctly. All of the I* classes take Opcode and Form as an argument. The remaining fields have defaults that can be overridden via modifiers added to the end of your...
2018 Mar 28
4
x86 instruction format which takes a single 64-bit immediate
I am attempting to create an instruction which takes a single 64-bit
immediate. This doesn't seem like a thing that would exist already (because
who needs an instruction which just takes an immediate?) How might I
implement this easily? Perhaps I could use a format which encodes a
register, which is then unused?
Thanks for the help.
Gus
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