Displaying 6 results from an estimated 6 matches for "ifcvf_32_bit_mask".
2019 Oct 16
0
[RFC 1/2] vhost: IFC VF hardware operation layer
...{
> + ifcvf_hw_disable(hw);
> + ifcvf_reset(hw);
> +}
> +
> +void ifcvf_enable_logging_vf(struct ifcvf_hw *hw, u64 log_base, u64 log_size)
> +{
> + u8 *lm_cfg;
> +
> + lm_cfg = hw->lm_cfg;
> +
> + *(u32 *)(lm_cfg + IFCVF_LM_BASE_ADDR_LOW) =
> + log_base & IFCVF_32_BIT_MASK;
> +
> + *(u32 *)(lm_cfg + IFCVF_LM_BASE_ADDR_HIGH) =
> + (log_base >> 32) & IFCVF_32_BIT_MASK;
> +
> + *(u32 *)(lm_cfg + IFCVF_LM_END_ADDR_LOW) =
> + (log_base + log_size) & IFCVF_32_BIT_MASK;
> +
> + *(u32 *)(lm_cfg + IFCVF_LM_END_ADDR_HIGH) =
> + ((log...
2019 Oct 21
0
[RFC 1/2] vhost: IFC VF hardware operation layer
...f_enable_logging_vf(struct ifcvf_hw *hw, u64 log_base, u64
>>> log_size)
>>> +{
>>> +??? u8 *lm_cfg;
>>> +
>>> +??? lm_cfg = hw->lm_cfg;
>>> +
>>> +??? *(u32 *)(lm_cfg + IFCVF_LM_BASE_ADDR_LOW) =
>>> +??????? log_base & IFCVF_32_BIT_MASK;
>>> +
>>> +??? *(u32 *)(lm_cfg + IFCVF_LM_BASE_ADDR_HIGH) =
>>> +??????? (log_base >> 32) & IFCVF_32_BIT_MASK;
>>> +
>>> +??? *(u32 *)(lm_cfg + IFCVF_LM_END_ADDR_LOW) =
>>> +??????? (log_base + log_size) & IFCVF_32_BIT_MASK;
>&...
2019 Nov 08
0
[PATCH 1/2] IFC hardware operation layer
...define IFCVF_QUEUE_ALIGNMENT PAGE_SIZE
> +
> +#define IFCVF_MSI_CONFIG_OFF 0
> +#define IFCVF_MSI_QUEUE_OFF 1
> +#define IFCVF_PCI_MAX_RESOURCE 6
> +
> +#define IFCVF_LM_CFG_SIZE 0x40
> +#define IFCVF_LM_RING_STATE_OFFSET 0x20
> +#define IFCVF_LM_BAR 4
> +
> +#define IFCVF_32_BIT_MASK 0xffffffff
> +
> +#define IFC_ERR(dev, fmt, ...) dev_err(dev, fmt, ##__VA_ARGS__)
> +#define IFC_DBG(dev, fmt, ...) dev_dbg(dev, fmt, ##__VA_ARGS__)
> +#define IFC_INFO(dev, fmt, ...) dev_info(dev, fmt, ##__VA_ARGS__)
> +
> +#define IFC_PRIVATE_TO_VF(adapter) \
> + (&((str...
2019 Nov 05
1
[PATCH 1/2] IFC hardware operation layer
...define IFCVF_QUEUE_ALIGNMENT PAGE_SIZE
> +
> +#define IFCVF_MSI_CONFIG_OFF 0
> +#define IFCVF_MSI_QUEUE_OFF 1
> +#define IFCVF_PCI_MAX_RESOURCE 6
> +
> +#define IFCVF_LM_CFG_SIZE 0x40
> +#define IFCVF_LM_RING_STATE_OFFSET 0x20
> +#define IFCVF_LM_BAR 4
> +
> +#define IFCVF_32_BIT_MASK 0xffffffff
> +
> +#define IFC_ERR(dev, fmt, ...) dev_err(dev, fmt, ##__VA_ARGS__)
> +#define IFC_DBG(dev, fmt, ...) dev_dbg(dev, fmt, ##__VA_ARGS__)
> +#define IFC_INFO(dev, fmt, ...) dev_info(dev, fmt, ##__VA_ARGS__)
> +
> +#define IFC_PRIVATE_TO_VF(adapter) \
> + (&((str...
2019 Nov 05
0
[PATCH 1/2] IFC hardware operation layer
...define IFCVF_QUEUE_ALIGNMENT PAGE_SIZE
> +
> +#define IFCVF_MSI_CONFIG_OFF 0
> +#define IFCVF_MSI_QUEUE_OFF 1
> +#define IFCVF_PCI_MAX_RESOURCE 6
> +
> +#define IFCVF_LM_CFG_SIZE 0x40
> +#define IFCVF_LM_RING_STATE_OFFSET 0x20
> +#define IFCVF_LM_BAR 4
> +
> +#define IFCVF_32_BIT_MASK 0xffffffff
> +
> +#define IFC_ERR(dev, fmt, ...) dev_err(dev, fmt, ##__VA_ARGS__)
> +#define IFC_DBG(dev, fmt, ...) dev_dbg(dev, fmt, ##__VA_ARGS__)
> +#define IFC_INFO(dev, fmt, ...) dev_info(dev, fmt, ##__VA_ARGS__)
> +
> +#define IFC_PRIVATE_TO_VF(adapter) \
> + (&((str...
2019 Nov 06
0
[PATCH 1/2] IFC hardware operation layer
...define IFCVF_QUEUE_ALIGNMENT PAGE_SIZE
> +
> +#define IFCVF_MSI_CONFIG_OFF 0
> +#define IFCVF_MSI_QUEUE_OFF 1
> +#define IFCVF_PCI_MAX_RESOURCE 6
> +
> +#define IFCVF_LM_CFG_SIZE 0x40
> +#define IFCVF_LM_RING_STATE_OFFSET 0x20
> +#define IFCVF_LM_BAR 4
> +
> +#define IFCVF_32_BIT_MASK 0xffffffff
> +
> +#define IFC_ERR(dev, fmt, ...) dev_err(dev, fmt, ##__VA_ARGS__)
> +#define IFC_DBG(dev, fmt, ...) dev_dbg(dev, fmt, ##__VA_ARGS__)
> +#define IFC_INFO(dev, fmt, ...) dev_info(dev, fmt, ##__VA_ARGS__)
> +
> +#define IFC_PRIVATE_TO_VF(adapter) \
> + (&((str...