Displaying 2 results from an estimated 2 matches for "i8rr".
2010 Jul 26
1
[LLVMdev] How to specify patterns for instructions with accumulator in selection DAG?
Hi,
I am wondering how to specify the selection DAG patterns for instructions
that use accumulator.
For example multiply-accumulate instruction with one destination operand and
two source operands:
mac $dst, $src1, $src2 ;; $dst += $src1*$src2
Seems that it has a cycle in the pattern. So how do I specify it in the DAG?
There are a few instructions in the ARM backend like this one, but the
2014 Jun 11
2
[LLVMdev] Help regarding ad new functionality in Backend
Dear,
I am looking at the Instructions defined in the XXXXInstrInfo.td where I
can see a def record defined like below
def ADD8rr : I8rr<0x0,
(outs GR8:$dst), (ins GR8:$src, GR8:$src2),
"add.b\t{$src2, $dst}",
[(set GR8:$dst, (*add *GR8:$src, GR8:$src2)),
(implicit SRW)]>;
Now here I would like the to replace the add(highlighted) by an arbi...