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...PUSH_DATA (push, 0x88888888); > + } > } > > BEGIN_NVC0(push, NVC0_3D(CODE_ADDRESS_HIGH), 2); > diff --git a/src/nvc0_accel.h b/src/nvc0_accel.h > index 607e97b..959f67f 100644 > --- a/src/nvc0_accel.h > +++ b/src/nvc0_accel.h > @@ -7,6 +7,7 @@ > #include "hwdefs/nvc0_m2mf.xml.h" > #include "hwdefs/nv50_defs.xml.h" > #include "hwdefs/nv50_texture.h" > +#include "hwdefs/gm107_texture.xml.h" > #include "hwdefs/nv_3ddefs.xml.h" > > /* subchannel assignments, compatible with kepler's fixed...

Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> --- src/nvc0_accel.c | 2 +- src/nvc0_accel.h | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/src/nvc0_accel.c b/src/nvc0_accel.c index 52a17db..0682806 100644 --- a/src/nvc0_accel.c +++ b/src/nvc0_accel.c @@ -313,7 +313,7 @@ NVAccelInit3D_NVC0(ScrnInfoPtr pScrn) PUSH_DATA (push, 0x00000001); BEGIN_NVC0(push,

...PUSH_DATA (push, 0x88888888); > + } > } > > BEGIN_NVC0(push, NVC0_3D(CODE_ADDRESS_HIGH), 2); > diff --git a/src/nvc0_accel.h b/src/nvc0_accel.h > index 607e97b..9378236 100644 > --- a/src/nvc0_accel.h > +++ b/src/nvc0_accel.h > @@ -7,6 +7,7 @@ > #include "hwdefs/nvc0_m2mf.xml.h" > #include "hwdefs/nv50_defs.xml.h" > #include "hwdefs/nv50_texture.h" > +#include "hwdefs/gm107_texture.xml.h" > #include "hwdefs/nv_3ddefs.xml.h" > > /* subchannel assignments, compatible with kepler's fixed...

...gt; } >> >> BEGIN_NVC0(push, NVC0_3D(CODE_ADDRESS_HIGH), 2); >> diff --git a/src/nvc0_accel.h b/src/nvc0_accel.h >> index 607e97b..959f67f 100644 >> --- a/src/nvc0_accel.h >> +++ b/src/nvc0_accel.h >> @@ -7,6 +7,7 @@ >> #include "hwdefs/nvc0_m2mf.xml.h" >> #include "hwdefs/nv50_defs.xml.h" >> #include "hwdefs/nv50_texture.h" >> +#include "hwdefs/gm107_texture.xml.h" >> #include "hwdefs/nv_3ddefs.xml.h" >> >> /* subchannel assignments, compatible...

...0x88888888); + PUSH_DATA (push, 0x88888888); + PUSH_DATA (push, 0x88888888); + } } BEGIN_NVC0(push, NVC0_3D(CODE_ADDRESS_HIGH), 2); diff --git a/src/nvc0_accel.h b/src/nvc0_accel.h index 607e97b..9378236 100644 --- a/src/nvc0_accel.h +++ b/src/nvc0_accel.h @@ -7,6 +7,7 @@ #include "hwdefs/nvc0_m2mf.xml.h" #include "hwdefs/nv50_defs.xml.h" #include "hwdefs/nv50_texture.h" +#include "hwdefs/gm107_texture.xml.h" #include "hwdefs/nv_3ddefs.xml.h" /* subchannel assignments, compatible with kepler's fixed layout */ @@ -108,4 +109,59...

...0x88888888); + PUSH_DATA (push, 0x88888888); + PUSH_DATA (push, 0x88888888); + } } BEGIN_NVC0(push, NVC0_3D(CODE_ADDRESS_HIGH), 2); diff --git a/src/nvc0_accel.h b/src/nvc0_accel.h index 607e97b..959f67f 100644 --- a/src/nvc0_accel.h +++ b/src/nvc0_accel.h @@ -7,6 +7,7 @@ #include "hwdefs/nvc0_m2mf.xml.h" #include "hwdefs/nv50_defs.xml.h" #include "hwdefs/nv50_texture.h" +#include "hwdefs/gm107_texture.xml.h" #include "hwdefs/nv_3ddefs.xml.h" /* subchannel assignments, compatible with kepler's fixed layout */ @@ -108,4 +109,59...

...gt; } >> >> BEGIN_NVC0(push, NVC0_3D(CODE_ADDRESS_HIGH), 2); >> diff --git a/src/nvc0_accel.h b/src/nvc0_accel.h >> index 607e97b..9378236 100644 >> --- a/src/nvc0_accel.h >> +++ b/src/nvc0_accel.h >> @@ -7,6 +7,7 @@ >> #include "hwdefs/nvc0_m2mf.xml.h" >> #include "hwdefs/nv50_defs.xml.h" >> #include "hwdefs/nv50_texture.h" >> +#include "hwdefs/gm107_texture.xml.h" >> #include "hwdefs/nv_3ddefs.xml.h" >> >> /* subchannel assignments, compatible...

These are copied directly from the mesa repository. Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> --- src/hwdefs/gm107_texture.xml.h | 365 +++++++++++++++++ src/hwdefs/nvc0_3d.xml.h | 867 +++++++++++++++++++++++++---------------- 2 files changed, 892 insertions(+), 340 deletions(-) create mode 100644 src/hwdefs/gm107_texture.xml.h diff --git a/src/hwdefs/gm107_texture.xml.h b/src/hwdefs/gm107_textu...

..._3D(0x0f90), 1); + BEGIN_NV04(push, NV50_3D(COLOR_MASK_COMMON), 1); PUSH_DATA (push, 1); BEGIN_NV04(push, NV50_3D(TIC_ADDRESS_HIGH), 3); diff --git a/src/nv50_accel.h b/src/nv50_accel.h index 87c88a3..9b06e38 100644 --- a/src/nv50_accel.h +++ b/src/nv50_accel.h @@ -8,6 +8,7 @@ #include "hwdefs/nv50_texture.h" #include "hwdefs/nv_3ddefs.xml.h" #include "hwdefs/nv_m2mf.xml.h" +#include "hwdefs/nv_object.xml.h" /* subchannel assignments - graphics channel */ #define SUBC_M2MF(mthd) 0, (mthd) diff --git a/src/nv50_exa.c b/src/nv50_exa.c index 7b1298...

...ade fixes necessary for GM20x based on testing results. I believe now it should actually work for all GM10x and GM20x. Further, GP10x should be very easy to add, but without someone to actually test I didn't want to claim support for it. Ilia Mirkin (7): exa: add GM10x acceleration support hwdefs: update nvc0_3d, add gm107_texture for new TIC format nvc0: make use of the new hwdefs for TEX_CB_INDEX nvc0: rename BEGIN_IMC0 to IMMED_NVC0 nvc0: refactor TIC uploads to allow different specifics per generation copy: add maxwell/pascal copy engine classes recognize and accelerate GM20x...

Ilia Mirkin (7):       exa: add GM10x acceleration support       hwdefs: update nvc0_3d, add gm107_texture for new TIC format       nvc0: make use of the new hwdefs for TEX_CB_INDEX       nvc0: rename BEGIN_IMC0 to IMMED_NVC0       nvc0: refactor TIC uploads to allow different specifics per generation       copy: add maxwell/pascal copy engine classes       recognize...

Ilia Mirkin (7):       exa: add GM10x acceleration support       hwdefs: update nvc0_3d, add gm107_texture for new TIC format       nvc0: make use of the new hwdefs for TEX_CB_INDEX       nvc0: rename BEGIN_IMC0 to IMMED_NVC0       nvc0: refactor TIC uploads to allow different specifics per generation       copy: add maxwell/pascal copy engine classes       recognize...

...ON diff --git a/src/Makefile.am b/src/Makefile.am index bf9c967..50dc586 100644 --- a/src/Makefile.am +++ b/src/Makefile.am @@ -54,6 +54,10 @@ nouveau_drv_la_SOURCES = \ drmmode_display.c \ vl_hwmc.c +if !XORG_WAYLAND +nouveau_drv_la_SOURCES += xwayland_compat.c +endif + EXTRA_DIST = hwdefs/nv_3ddefs.xml.h \ hwdefs/nv_m2mf.xml.h \ hwdefs/nv_object.xml.h \ diff --git a/src/nouveau_dri2.c b/src/nouveau_dri2.c index 0b3cc38..c7f769d 100644 --- a/src/nouveau_dri2.c +++ b/src/nouveau_dri2.c @@ -653,6 +653,21 @@ nouveau_dri2_flip_event_handler(unsigned int frame, unsigned int...

...model; + const char *kernel_filename = args->kernel_filename; stellaris_init(kernel_filename, cpu_model, &stellaris_boards[1]); } diff --git a/hw/sun4m.c b/hw/sun4m.c index a04b485..dbe93f9 100644 --- a/hw/sun4m.c +++ b/hw/sun4m.c @@ -1306,92 +1306,118 @@ static const struct sun4m_hwdef sun4m_hwdefs[] = { }; /* SPARCstation 5 hardware initialisation */ -static void ss5_init(ram_addr_t RAM_size, - const char *boot_device, - const char *kernel_filename, const char *kernel_cmdline, - const char *initrd_filename, const ch...

...v110.fp create mode 100644 src/shader/videonv110.fpc create mode 100644 src/shader/xfrm2nv110.vp create mode 100644 src/shader/xfrm2nv110.vpc diff --git a/src/Makefile.am b/src/Makefile.am index 1e04ddf..6ba8d87 100644 --- a/src/Makefile.am +++ b/src/Makefile.am @@ -77,48 +77,64 @@ EXTRA_DIST = hwdefs/nv_3ddefs.xml.h \ shader/exac8nve0.fpc \ shader/exac8nvf0.fp \ shader/exac8nvf0.fpc \ + shader/exac8nv110.fp \ + shader/exac8nv110.fpc \ shader/exacanvc0.fp \ shader/exacanvc0.fpc \ shader/exacanve0.fp \ shader/exacanve0.fpc \ shade...

...v110.fp create mode 100644 src/shader/videonv110.fpc create mode 100644 src/shader/xfrm2nv110.vp create mode 100644 src/shader/xfrm2nv110.vpc diff --git a/src/Makefile.am b/src/Makefile.am index 1e04ddf..6ba8d87 100644 --- a/src/Makefile.am +++ b/src/Makefile.am @@ -77,48 +77,64 @@ EXTRA_DIST = hwdefs/nv_3ddefs.xml.h \ shader/exac8nve0.fpc \ shader/exac8nvf0.fp \ shader/exac8nvf0.fpc \ + shader/exac8nv110.fp \ + shader/exac8nv110.fpc \ shader/exacanvc0.fp \ shader/exacanvc0.fpc \ shader/exacanve0.fp \ shader/exacanve0.fpc \ shade...

...videonv110.fpc > create mode 100644 src/shader/xfrm2nv110.vp > create mode 100644 src/shader/xfrm2nv110.vpc > > diff --git a/src/Makefile.am b/src/Makefile.am > index 1e04ddf..6ba8d87 100644 > --- a/src/Makefile.am > +++ b/src/Makefile.am > @@ -77,48 +77,64 @@ EXTRA_DIST = hwdefs/nv_3ddefs.xml.h \ > shader/exac8nve0.fpc \ > shader/exac8nvf0.fp \ > shader/exac8nvf0.fpc \ > + shader/exac8nv110.fp \ > + shader/exac8nv110.fpc \ > shader/exacanvc0.fp \ > shader/exacanvc0.fpc \ > shader/exacanve0.fp \ &g...

Hi all, This is version three of the patches I previously posted here: v1: https://lore.kernel.org/lkml/20191108170120.22331-1-will at kernel.org/ v2: https://lore.kernel.org/r/20200630173734.14057-1-will at kernel.org Changes since v2 include: * Actually add the barrier in READ_ONCE() for Alpha! * Implement Alpha's smp_load_acquire() using __READ_ONCE(), rather than the other

Hi everyone, This is the long-awaited version two of the patches I previously posted in November last year: https://lore.kernel.org/lkml/20191108170120.22331-1-will at kernel.org/ I ended up parking the series while the READ_ONCE() implementation was being overhauled, but with that merged during the recent merge window and LTO patches being posted again [1], it was time for a refresh. The

Hi everyone, This is the long-awaited version two of the patches I previously posted in November last year: https://lore.kernel.org/lkml/20191108170120.22331-1-will at kernel.org/ I ended up parking the series while the READ_ONCE() implementation was being overhauled, but with that merged during the recent merge window and LTO patches being posted again [1], it was time for a refresh. The