Displaying 3 results from an estimated 3 matches for "hvm_memory_event_msr".
2013 Jan 03
2
[PATCH V4] mem_event: Add support for MEM_EVENT_REASON_MSR
...Dec 21 17:05:38 2012 +0000
+++ b/xen/arch/x86/hvm/hvm.c Thu Jan 03 12:05:13 2013 +0200
@@ -2927,6 +2927,8 @@ int hvm_msr_write_intercept(unsigned int
hvm_cpuid(1, &cpuid[0], &cpuid[1], &cpuid[2], &cpuid[3]);
mtrr = !!(cpuid[3] & cpufeat_mask(X86_FEATURE_MTRR));
+ hvm_memory_event_msr(msr, msr_content);
+
switch ( msr )
{
case MSR_EFER:
@@ -3862,6 +3864,7 @@ long do_hvm_op(unsigned long op, XEN_GUE
break;
case HVM_PARAM_MEMORY_EVENT_INT3:
case HVM_PARAM_MEMORY_EVENT_SINGLE_STEP:
+ case HVM_PARAM_MEMORY_EVENT_MS...
2012 Dec 20
4
[PATCH V2] mem_event: Add support for MEM_EVENT_REASON_MSR
...Dec 18 18:16:52 2012 +0000
+++ b/xen/arch/x86/hvm/hvm.c Thu Dec 20 14:52:52 2012 +0200
@@ -2927,6 +2927,8 @@ int hvm_msr_write_intercept(unsigned int
hvm_cpuid(1, &cpuid[0], &cpuid[1], &cpuid[2], &cpuid[3]);
mtrr = !!(cpuid[3] & cpufeat_mask(X86_FEATURE_MTRR));
+ hvm_memory_event_msr(msr, msr_content);
+
switch ( msr )
{
case MSR_EFER:
@@ -3857,6 +3859,7 @@ long do_hvm_op(unsigned long op, XEN_GUE
case HVM_PARAM_MEMORY_EVENT_CR0:
case HVM_PARAM_MEMORY_EVENT_CR3:
case HVM_PARAM_MEMORY_EVENT_CR4:
+ case HVM_PARAM_ME...
2013 Sep 23
11
[PATCH v4 0/4] x86/HVM: miscellaneous improvements
The first and third patches are cleaned up versions of an earlier v3
submission by Yang.
1: Nested VMX: check VMX capability before read VMX related MSRs
2: VMX: clean up capability checks
3: Nested VMX: fix IA32_VMX_CR4_FIXED1 msr emulation
4: x86: make hvm_cpuid() tolerate NULL pointers
Signed-off-by: Jan Beulich <jbeulich@suse.com>