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On Tue, Jan 06, 2015 at 08:03:03PM +0800, Vince Hsu wrote: > On 01/06/2015 07:15 PM, Thierry Reding wrote: > >* PGP Signed by an unknown key > > > >On Tue, Jan 06, 2015 at 10:11:41AM +0800, Vince Hsu wrote: > >>On 01/05/2015 11:09 PM, Thierry Reding wrote: > >>>>Old Signed by an unknown key > >>&...

On Tue, Jan 06, 2015 at 10:11:41AM +0800, Vince Hsu wrote: > > On 01/05/2015 11:09 PM, Thierry Reding wrote: > >* PGP Signed by an unknown key > > > >On Thu, Dec 25, 2014 at 10:28:08AM +0800, Vince Hsu wrote: > >>On 12/24/2014 09:16 PM, Lucas Stach wrote: > >>>Am Dienstag, den 23.12.2014, 18:39 +0800 sch...

On Thu, Dec 25, 2014 at 10:28:08AM +0800, Vince Hsu wrote: > On 12/24/2014 09:16 PM, Lucas Stach wrote: > >Am Dienstag, den 23.12.2014, 18:39 +0800 schrieb Vince Hsu: > >>The Tegra124 and later Tegra SoCs have a sepatate rail gating register > >>to enable/disable the clamp. The original function > >>tegra_powergat...

On 01/07/2015 06:19 PM, Peter De Schrijver wrote: > On Mon, Jan 05, 2015 at 04:09:33PM +0100, Thierry Reding wrote: >> * PGP Signed by an unknown key >> >> On Thu, Dec 25, 2014 at 10:28:08AM +0800, Vince Hsu wrote: >>> On 12/24/2014 09:16 PM, Lucas Stach wrote: >>>> Am Dienstag, den 23.12.2014, 18:39 +0800 schrieb Vince Hsu: >>>>> The Tegra124 and later Tegra SoCs have a sepatate rail gating register >>>>> to enable/disable the clamp. The original func...

On 12/22/2014 05:11 PM, Vince Hsu wrote: > The platform device does not use the common nouveau_pwr_init() to initialize > the PWR, but it does need the .prob() be assigned to avoid NULL pointer > dereference in graph/nve4.c. s/prob/pgob/ :-( Will fix in next version. > > Signed-off-by: Vince Hsu <vinceh at nvidia...

On Tue, Jan 06, 2015 at 08:13:01PM +0800, Vince Hsu wrote: > > On 01/06/2015 07:36 PM, Thierry Reding wrote: > >* PGP Signed by an unknown key > > > >On Tue, Jan 06, 2015 at 05:34:01PM +0800, Vince Hsu wrote: > >>On 01/05/2015 11:25 PM, Thierry Reding wrote: > >>>>Old Signed by an unknown key > &gt...

On Tue, Jan 06, 2015 at 05:34:01PM +0800, Vince Hsu wrote: > > On 01/05/2015 11:25 PM, Thierry Reding wrote: > >* PGP Signed by an unknown key > > > >On Thu, Dec 25, 2014 at 10:42:58AM +0800, Vince Hsu wrote: > >>On 12/24/2014 09:23 PM, Lucas Stach wrote: > >>>Am Dienstag, den 23.12.2014, 18:39 +0800 sch...

...even attempt to do that. (This was done mainly to demonstrate the feature set of the new model, not because it’s terribly important). The new model for A9 is also complicated by a mapping from the old itinerary classes to the new machine model. -Andy > Thanks, > > Kind regards > Kuan-Hsu > > > > 2013/10/15 Andrew Trick <atrick at apple.com> > > On Oct 14, 2013, at 3:27 AM, Zakk <zakk0610 at gmail.com> wrote: > >> Hi all, >> I meet this problem when compiling the TREAM benchmark (http://www.cs.virginia.edu/stream/FTP/Code/) with ena...

...r1, r1, #32 cmp r1, r3 vmul.f64 d19, d19, d16 vmul.f64 d20, d20, d16 vstmia r0, {d17, d18, d19, d20} bne .LBB0_1 bx lr this is just because A9's per-operand machine model is not implemented well? By the way, why do you want to use the new machine model for mi-sched? Thanks, Kind regards Kuan-Hsu 2013/10/15 Andrew Trick <atrick at apple.com> > > On Oct 14, 2013, at 3:27 AM, Zakk <zakk0610 at gmail.com> wrote: > > Hi all, > I meet this problem when compiling the TREAM benchmark ( > http://www.cs.virginia.edu/stream/FTP/Code/) with enable-misched > > Th...

On 04:12:54PM Jan 07, Peter De Schrijver wrote: > On Wed, Jan 07, 2015 at 06:49:27PM +0800, Vince Hsu wrote: > > > > On 01/07/2015 06:19 PM, Peter De Schrijver wrote: > > >On Mon, Jan 05, 2015 at 04:09:33PM +0100, Thierry Reding wrote: > > >>* PGP Signed by an unknown key > > >> > > >>On Thu, Dec 25, 2014 at 10:28:08AM +0800, Vince Hsu wrote...

On Tue, Dec 30, 2014 at 11:18:34AM +0800, Vince Hsu wrote: > Hi Emil, > > On 12/30/2014 10:34 AM, Emil Velikov wrote: > >On 23/12/14 10:40, Vince Hsu wrote: > >>This patch adds some checks in the suspend/resume functions to distinguish > >>the dGPU and mobile GPU and exports some variables/functions so that the >...

...ing, and then building on both the 3.5 release branch as well as master, a set of LLVM JIT regression tests fail do to numeric size mismatches. This does not occur on the “Visual Studio 12 2013” option, which builds a 32-bit version of clang instead of a 64-bit version of clang. -- Aaron W. Hsu | arcfide at sacrideo.us | http://www.sacrideo.us Please support my work: https://www.gratipay.com/arcfide/ לֵ֤ב חֲכָמִים֙ בְּבֵ֣ית אֵ֔בֶל וְלֵ֥ב כְּסִילִ֖ים בְּבֵ֥ית שִׂמְחָֽה׃ -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-...

On Tue, Jan 06, 2015 at 08:27:06PM +0800, Vince Hsu wrote: > > On 01/06/2015 07:49 PM, Thierry Reding wrote: > >* PGP Signed by an unknown key > > > >On Mon, Jan 05, 2015 at 08:50:18PM +0100, Alexandre Courbot wrote: > >>On Mon, Jan 5, 2015 at 4:32 PM, Thierry Reding <thierry.reding at gmail.com> wrote: > &...

On Thu, Apr 16, 2015 at 8:06 PM, Vince Hsu <vinceh at nvidia.com> wrote: > Some platforms have IOMMU to map non-contiguous physical memory into > contiguous GPU virtual address. We can use this feature to enable big pages > mapping on scattered small pages. To achieve that, we also need changes in > subdev/mmu as well. &gt...

Am Dienstag, den 23.12.2014, 18:39 +0800 schrieb Vince Hsu: > The Tegra124 and later Tegra SoCs have a sepatate rail gating register > to enable/disable the clamp. The original function > tegra_powergate_remove_clamping() is not sufficient for the enable > function. So add a new function which is dedicated to the GPU rail > gating. Also don&...

...the GK20A power on/off sequences and add the suspend/resume support. The patches 1/11 - 4/11 are based on the linux-next-20141219. The patches 5/11 - 11/11 are based on the branch "linux-3.19" of Ben Skeggs's tree (http://cgit.freedesktop.org/~darktama/nouveau). Thanks, Vince Vince Hsu (4): (linux-next-20141219) ARM: tegra: add function to control the GPU rail clamp memory: tegra: add mc flush support memory: tegra: add flush operation for Tegra124 memory clients ARM: tegra: add mc node for Tegra124 GPU arch/arm/boot/dts/tegra124.dtsi | 1 + drivers/memory/tegra/mc.c...

On Wed, Jan 7, 2015 at 3:10 PM, Vince Hsu <vinceh at nvidia.com> wrote: > Hello Ben and Martin, > > Any comments for this series? Hey Vince, Ah sorry, I thought my comment on the other patch indicated I was fine with it. I'll merge them now so they don't get lost :) Thanks, Ben. > > Thanks, > Vince >...

On Thu, Dec 25, 2014 at 10:42:58AM +0800, Vince Hsu wrote: > > On 12/24/2014 09:23 PM, Lucas Stach wrote: > >Am Dienstag, den 23.12.2014, 18:39 +0800 schrieb Vince Hsu: > >>This patch adds some missing pieces of the rail gaing/ungating sequence that > >>can improve the stability in theory. > >> > >>Si...

On 02:29:32PM Jan 06, Thierry Reding wrote: > * PGP Signed by an unknown key > > On Tue, Jan 06, 2015 at 08:03:03PM +0800, Vince Hsu wrote: > > On 01/06/2015 07:15 PM, Thierry Reding wrote: > > >> Old Signed by an unknown key > > > > > >On Tue, Jan 06, 2015 at 10:11:41AM +0800, Vince Hsu wrote: > > >>On 01/05/2015 11:09 PM, Thierry Reding wrote: > > >>>>Old Signed...

On Thu, Apr 16, 2015 at 8:06 PM, Vince Hsu <vinceh at nvidia.com> wrote: > Instead of hard-coding the translation bit in subdev driver, we refer to > the platform data. > > Signed-off-by: Vince Hsu <vinceh at nvidia.com> > --- > drm/nouveau/nvkm/subdev/instmem/gk20a.c | 13 +++++++++---- > 1 file changed, 9...