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2016 May 25
2
LLVM-HPC2016 Workshop at SC16 - Call for papers
CALL FOR PAPERS
=================================================================
LLVM-HPC2016:
The Third Workshop on the LLVM Compiler Infrastructure in HPC
http://llvm-hpc3-workshop.github.io/
November 14th, 2016, Salt Lake City, UT
In conjunction with the
2016 ACM/IEEE Supercomputing Conference (SC16)
=================================================================
The third annual LLVM in HPC Workshop, held in conjunctio...
2016 Dec 12
0
LLVM Weekly - #154, Dec 12th 2016
...ace-from-c-source-code-using-clang-libtooling/).
[Psyche-c](http://cuda.dcc.ufmg.br/psyche-c/) is an interesting project,
providing a compiler for incomplete C code. It includes a Hindley-Milner type
inference engine to reconstruct missing type information.
Slides are [now available](https://llvm-hpc3-workshop.github.io/) from the
LLVM in HPC workshop at SC16.
Phoronix have produced an updated [performance
comparison](http://www.phoronix.com/scan.php?page=article&item=gcc7-clang4-december&num=1)
for code generated by LLVM and by GCC.
## On the mailing lists
* Rui Ueyama has posted an...
2017 Jan 11
10
[RFC] IR-level Region Annotations
...ta !1, %xp, 1, 20,
metadata !1, %yp, 0, 10)
loop
call void @llvm.experimental.directive(metadata !3)
References
==========
[1] LLVM Framework and IR extensions for Parallelization, SIMD
Vectorization
and Offloading Support. SC'2016 LLVM-HPC3 Workshop. (Xinmin Tian
et.al.)
Saltlake City, Utah.
[2] Extending LoopVectorizer towards supporting OpenMP4.5 SIMD and outer
loop
auto-vectorization. (Hideki Saito, et.al.) LLVM Developers' Meeting
2016,
San Jose.
[3] Intrinsics, Metadata, and Attributes: The Story continues...
2017 Jan 11
2
[RFC] IR-level Region Annotations
...tadata !1, %xp, 1, 20,
metadata !1, %yp, 0, 10)
loop
call void @llvm.experimental.directive(metadata !3)
References
==========
[1] LLVM Framework and IR extensions for Parallelization, SIMD Vectorization
and Offloading Support. SC'2016 LLVM-HPC3 Workshop. (Xinmin Tian et.al<http://et.al>.)
Saltlake City, Utah.
[2] Extending LoopVectorizer towards supporting OpenMP4.5 SIMD and outer loop
auto-vectorization. (Hideki Saito, et.al<http://et.al>.) LLVM Developers' Meeting 2016,
San Jose.
[3] Intrinsics, Metadata, a...
2017 Jan 11
3
[RFC] IR-level Region Annotations
...!1, %yp, 0, 10)
>> loop
>> call void @llvm.experimental.directive(metadata !3)
>>
>> References
>> ==========
>>
>> [1] LLVM Framework and IR extensions for Parallelization, SIMD
>> Vectorization
>> and Offloading Support. SC'2016 LLVM-HPC3 Workshop. (Xinmin Tian
>> et.al.)
>> Saltlake City, Utah.
>>
>> [2] Extending LoopVectorizer towards supporting OpenMP4.5 SIMD and outer
>> loop
>> auto-vectorization. (Hideki Saito, et.al.) LLVM Developers' Meeting
>> 2016,
>> San Jos...
2017 Jan 11
2
[RFC] IR-level Region Annotations
...tadata !1, %xp, 1, 20,
metadata !1, %yp, 0, 10)
loop
call void @llvm.experimental.directive(metadata !3)
References
==========
[1] LLVM Framework and IR extensions for Parallelization, SIMD Vectorization
and Offloading Support. SC'2016 LLVM-HPC3 Workshop. (Xinmin Tian et.al<http://et.al>.)
Saltlake City, Utah.
[2] Extending LoopVectorizer towards supporting OpenMP4.5 SIMD and outer loop
auto-vectorization. (Hideki Saito, et.al<http://et.al>.) LLVM Developers' Meeting 2016,
San Jose.
[3] Intrinsics, Metadata, a...
2017 Jan 13
4
[RFC] IR-level Region Annotations
...metadata !1, %yp, 0, 10)
> loop
> call void @llvm.experimental.directive(metadata !3)
>
> References
> ==========
>
> [1] LLVM Framework and IR extensions for Parallelization, SIMD Vectorization
> and Offloading Support. SC'2016 LLVM-HPC3 Workshop. (Xinmin Tian et.al.)
> Saltlake City, Utah.
>
> [2] Extending LoopVectorizer towards supporting OpenMP4.5 SIMD and outer loop
> auto-vectorization. (Hideki Saito, et.al.) LLVM Developers' Meeting 2016,
> San Jose.
>
> [3] Intrinsics, Metadata, and Attri...
2017 Jan 13
2
[RFC] IR-level Region Annotations
...metadata !1, %yp, 0, 10)
> loop
> call void @llvm.experimental.directive(metadata !3)
>
> References
> ==========
>
> [1] LLVM Framework and IR extensions for Parallelization, SIMD
> Vectorization
> and Offloading Support. SC'2016 LLVM-HPC3 Workshop. (Xinmin Tian
> et.al.)
> Saltlake City, Utah.
>
> [2] Extending LoopVectorizer towards supporting OpenMP4.5 SIMD and outer
> loop
> auto-vectorization. (Hideki Saito, et.al.) LLVM Developers' Meeting
> 2016,
> San Jose.
>
> [3] Intrinsics...
2017 Jan 11
2
[RFC] IR-level Region Annotations
...tadata !1, %xp, 1, 20,
metadata !1, %yp, 0, 10)
loop
call void @llvm.experimental.directive(metadata !3)
References
==========
[1] LLVM Framework and IR extensions for Parallelization, SIMD Vectorization
and Offloading Support. SC'2016 LLVM-HPC3 Workshop. (Xinmin Tian et.al<http://et.al>.)
Saltlake City, Utah.
[2] Extending LoopVectorizer towards supporting OpenMP4.5 SIMD and outer loop
auto-vectorization. (Hideki Saito, et.al<http://et.al>.) LLVM Developers' Meeting 2016,
San Jose.
[3] Intrinsics, Metadata, a...
2017 Jan 12
3
[RFC] IR-level Region Annotations
...tadata !1, %xp, 1, 20,
metadata !1, %yp, 0, 10)
loop
call void @llvm.experimental.directive(metadata !3)
References
==========
[1] LLVM Framework and IR extensions for Parallelization, SIMD Vectorization
and Offloading Support. SC'2016 LLVM-HPC3 Workshop. (Xinmin Tian et.al<http://et.al>.)
Saltlake City, Utah.
[2] Extending LoopVectorizer towards supporting OpenMP4.5 SIMD and outer loop
auto-vectorization. (Hideki Saito, et.al<http://et.al>.) LLVM Developers' Meeting 2016,
San Jose.
[3] Intrinsics, Metadata, a...