Displaying 3 results from an estimated 3 matches for "hassse41".
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hassse1
2015 Oct 21
2
bad identification of the CPU pentium dual core ( penryn instead of core2 )
...h is the good behaviour,
the llvm git commit who has introduced this bug is :
cd83d5b5071f072882ad06cc4b904b2d27d1e54a
https://github.com/llvm-mirror/llvm/commit/cd83d5b5071f072882ad06cc4b904b2d27d1e54a
this faulty commit has deleted a crucial test about SSE4 for CPU family
6 model 23 :
return HasSSE41 ? "penryn" : "core2";
the solution is simply to re-add this test for CPU family 6 model 23,
here is the patch :
--- a/lib/Support/Host.cpp 2015-10-14 07:13:52.381374679 +0200
+++ b/lib/Support/Host.cpp 2015-10-14 07:13:28.224708323 +0200
@@ -332,6 +332,8 @@...
2013 Nov 23
0
[LLVMdev] [PATCH] Detect Haswell subarchitecture (i.e. using -march=native)
...g sys::getHostCPUName() {
unsigned Model = 0;
DetectX86FamilyModel(EAX, Family, Model);
+ union {
+ unsigned u[3];
+ char c[12];
+ } text;
+
+ GetX86CpuIDAndInfo(0, &EAX, text.u+0, text.u+2, text.u+1);
+
+ unsigned MaxLeaf = EAX;
bool HasSSE3 = (ECX & 0x1);
bool HasSSE41 = (ECX & 0x80000);
// If CPUID indicates support for XSAVE, XRESTORE and AVX, and XGETBV
@@ -138,15 +215,12 @@ std::string sys::getHostCPUName() {
// switch, then we have full AVX support.
const unsigned AVXBits = (1 << 27) | (1 << 28);
bool HasAVX = ((ECX & AVXBits...
2013 Nov 23
2
[LLVMdev] [PATCH] Detect Haswell subarchitecture (i.e. using -march=native)
I agree with Tim, you need to implement a GetCpuIDAndInfoEx function in
Host.cpp and pass the correct value to ecx. Also you need to verify that 7
is a valid leaf because an invalid leaf is defined to return the highest
supported leaf on that processor. So if a processor supports say leaf 6 and
not leaf 7, then an access leaf 7 will return the data from leaf 6 causing
unrelated bits to be