search for: guest_mode

...m/traps.c b/xen/arch/arm/traps.c index bddd7d4..f42e4e9 100644 --- a/xen/arch/arm/traps.c +++ b/xen/arch/arm/traps.c @@ -73,6 +73,64 @@ static void print_xen_info(void) debug, print_tainted(taint_str)); } +uint32_t *select_user_reg(struct cpu_user_regs *regs, int reg) +{ + BUG_ON( guest_mode(regs) ); + + /* + * We rely heavily on the layout of cpu_user_regs to avoid having + * to handle all of the registers individually. Use BUILD_BUG_ON to + * ensure that things which expect are contiguous actually are. + */ +#define REGOFFS(R) offsetof(struct cpu_user_regs, R) + +...

Xiaowei, I''m puzzled by the following bit of code in p4_check_ctrs():        if (guest_kernel_mode(current, regs))                 mode = 1;         else if (ring_0(regs))                 mode = 2; If I look at the definition for guest_kernel_mode() it is: include/asm-x86/x86_64/regs.h: #define guest_kernel_mode(v, r)   \     (ring_3(r) && ((v)->arch.flags &

This patch fixes size of ttbcr register (TCR_EL1 in case of AArch64) and it''s programming considering size in case of context switch. Currently ttbcr is defined as 32b register but for AArch64 TCR_EL1 size is 64b. Signed-off-by: Anup Patel <anup.patel@linaro.org> Signed-off-by: Pranavkumar Sawargaonkar <pranavkumar@linaro.org> --- xen/arch/arm/domain.c | 8

...virtual-only contexts. > >It might make sense to invert[*] the predicate and rename to >user_mode(). Then definition is simply ring_3(regs) for x86/32 and >(ring_3(regs) && !((v)->arch.flags & TF_kernel_mode)) for x86/64. > >So maybe: > int mode = 2; > if (guest_mode(regs)) > mode = user_mode(current, regs) ? 0 : 1; Yes, this is a better solution for sure, to take both para-domain and hvm into account. But it''s not a problem for now:) _mode_ logic only applies to active domiain. Oprofile doesn''t use it for samples between PASSIVE_STA...

This round implements all of the review comments from V2 and all patches are now acked. Unless there are any objections I intend to apply later this morning. Ian.

First off, Apologies for the massive patch series... This series boots a 32-bit dom0 kernel to a command prompt on an ARMv8 (AArch64) model. The kernel is the same one as I am currently using with the 32 bit hypervisor I haven''t yet tried starting a guest or anything super advanced like that ;-). Also there is not real support for 64-bit domains at all, although in one or two places I

...vcpu(current) ) - clear_bit(X86_FEATURE_SYSCALL % 32, &d); +#ifdef __i386__ + clear_bit(X86_FEATURE_SYSCALL % 32, &d); +#endif clear_bit(X86_FEATURE_RDTSCP % 32, &d); } else @@ -2026,6 +2031,13 @@ asmlinkage int do_debug(struct cpu_user_ if ( !guest_mode(regs) ) { +#ifdef __x86_64__ + /* + * Single stepping across sysenter must not result in the single step + * flag being lost: record it here for create_bounce_frame to pick up. + */ + v->arch.eflags_mask |= (regs->eflags & EF_TF); +#endif...

1: correct LDT checks 2: add address validity check to guest_map_l1e() 3: use {rd,wr}{fs,gs}base when available 4: check for canonical address before doing page walks Signed-off-by: Jan Beulich <jbeulich@suse.com>

...:03.000000000 +0200 @@ -18,6 +18,7 @@ #include <asm/msr.h> #include <asm/page.h> #include <asm/shadow.h> +#include <asm/shared.h> #include <asm/hvm/hvm.h> #include <asm/hvm/support.h> @@ -53,7 +54,7 @@ void show_registers(struct cpu_user_regs if ( guest_mode(regs) ) { context = "guest"; - fault_crs[2] = current->vcpu_info->arch.cr2; + fault_crs[2] = arch_get_cr2(current); } else { @@ -241,7 +242,7 @@ unsigned long do_iret(void) clear_bit(_VCPUF_nmi_masked, &...

This patch series is a reworking of a series developed by Mukesh Rathor at Oracle. The entirety of the design and development was done by him; I have only reworked, reorganized, and simplified things in a way that I think makes more sense. The vast majority of the credit for this effort therefore goes to him. This version is labelled v13 because it is based on his most recent series, v11.

Hello everyone, this is the fourth version of the patch series that introduces ARMv7 with virtualization extensions support in Xen. The series allows Xen and Dom0 to boot on a Cortex-A15 based Versatile Express simulator. See the following announce email for more informations about what we are trying to achieve, as well as the original git history: See

Hello everyone, this is the very first version of the patch series that introduces ARMv7 with virtualization extensions support in Xen. The series allows Xen and Dom0 to boot on a Cortex-A15 based Versatile Express simulator. See the following announce email for more informations about what we are trying to achieve, as well as the original git history: See

The KVM introspection subsystem provides a facility for applications running on the host or in a separate VM, to control the execution of other VM-s (pause, resume, shutdown), query the state of the vCPUs (GPRs, MSRs etc.), alter the page access bits in the shadow page tables (only for the hardware backed ones, eg. Intel's EPT) and receive notifications when events of interest have taken place

The KVM introspection subsystem provides a facility for applications running on the host or in a separate VM, to control the execution of other VM-s (pause, resume, shutdown), query the state of the vCPUs (GPRs, MSRs etc.), alter the page access bits in the shadow page tables (only for the hardware backed ones, eg. Intel's EPT) and receive notifications when events of interest have taken place