search for: gsub_1

...ctions that do not return 64 bit value? Example: This is a simple example of machine instructions I caused to be generated. I forced the LDRi12 instructions to use a GPRPair sub-register. The copy into %vreg4 asserts because of the two definitions of vreg9, coming from vreg9:gsub_0 and vreg9:gsub_1. %vreg1<def> = COPY %R1; GPR:%vreg1 %vreg2<def> = MOVi32imm <ga:@a>; GPR:%vreg2 %vreg3<def> = ADDrsi %vreg2<kill>, %vreg1, 18, pred:14, pred:%noreg, opt:%noreg; GPR:%vreg3,%vreg2,%vreg1 %vreg9:gsub_0<def,read-undef> = LDRi12...

...r rGPR that doesn't contain the SP, .). If I add a new RegisterClass however, the dynamically created GPRPair class corresponding to this new RegisterClass overlaps with the dynamically created class for rGPR. In Thumb2InstrInfo.cpp, the dynamically created TargetRegisterClass GPRPair_with_gsub_1_in_rGPRRegClass is explicitly called out. If I add my new class, the class GPRPair_with_gsub_1_in_rGPRRegClass is never created, instead the class GPRPair_with_gsub_1_in_newGPRRegClass is created. Compilation therefore fails. I could simply rename the RegisterClass so that it is alphabetically sort...