search for: greve

...t it should fail. * HOW could it have been made to work? * WHAT kind of information was I lacking? or, in short: WHAT did I do wrong? I''d be grateful to find an answer and think it might help to then find a way to add that answer into the LARTC HOWTO. Regards, Georg -- Georg C. F. Greve <greve@fsfeurope.org> Free Software Foundation Europe (http://fsfeurope.org) Join the Fellowship and protect your freedom! (http://www.fsfe.org) _______________________________________________ LARTC mailing list LARTC@mailman.ds9a.nl http...

------- Forwarded Message Sender: greve@fusebox.hanse.de To: vorbis-dev@xiph.org Cc: info@xiph.org, webmaster@xiph.org Subject: Brave GNU World feature about ogg From: "Georg C. F. Greve" <greve@gnu.org> Organization: GNU Project X-Home-Page: http://www.gnu.org/people/greve.html X-ICQ-Number: 10016966 X-Request-PGP: mailt...

Hello, in the last days I switched from Xen 4.2.1 to Xen 4.2.2 (source from git repository tag 4.2.2) commit a125ec6a4a2f028f97f0bdd8946d347a36dbe76b Author: Jan Beulich <jbeulich@suse.com> Date: Tue Apr 23 18:42:55 2013 +0200 update Xen version to 4.2.2 My "base system" is a debian squeeze. For Xen I use the xl toolstack. Since updating to 4.2.2 the autosave and

A constant i1 is stored as a one bit APInt wrapped in a ConstantInt which is then wrapped in ConstantSDNode for SelectionDAG. The BUILD_VECTOR will just point to the same ConstantSDNode for each element. There is no concept of a sign in the storage. It's just a bit. Whether or not its treated as 1 or negative 1 is going to depend on the code looking at the value including printing code. And

Skipping the clang question for now, this had to be a loop pragma of some kind. One step back: what we really need is a way to express that memory accesses between iterations can be re-ordered. The code that's being compiled _is_ noalias, but we don't _have_ to use noalias semantics, e.g. loop parallel semantics are sufficient. What's missing is a way to express that past the llvm

Yea. I think AMD chains the node they're expanding into, but they don't chain it into an _existing_ chain. e.g. adding A->B to the DAG is ok. But adding A->B and next C->D with B->C is the problem. I appreciate the input On Thu, Jul 16, 2020 at 2:04 PM Matt Arsenault <arsenm2 at gmail.com> wrote: > > > > On Jul 16, 2020, at 17:00, Hendrik Greving

Re: Do they really need to be chained with each other or anything else Yes. For 2 reasons. Our architecture lowers udivmem into something with 1 producer and 2 consumers. Reason 1) neither the producers nor the consumers must get reordered. Reason 2) one of the consumers might be missing (either the div or mod consumer might not be present. Yet we need to keep the consuming instruction with side

Would you guys be open to supporting a new hint with the right semantics, like e.g. llvm.loop.noalias_accesses?! I would need to find support in clang however and the main point of support would be the loop unroller behaving as stated in the OP. On Thu, May 14, 2020 at 3:04 PM Michael Kruse <llvmdev at meinersbur.de> wrote: > Trivial example: > > #pragma clang loop

...Where are those extra bytes coming from since the inode certainly does not have the blocks! Doing a fcsk does not fix the situation as shown below. This is on a RH7.3 machine running a 2.4.20 kernel root at 1[bh-sm5-per-006]# debugfs /dev/hda4 debugfs 1.35-WIP (31-Jan-2004) debugfs: stat users/greve/fbirn-hp-fsfast/dunc-data/dunc-101.1/bold/bh-sm5-per-006/beta_008.bfloat Inode: 5980769 Type: regular Mode: 0777 Flags: 0x0 Generation: 4199683 297 User: 5652 Group: 5652 Size: 4243456 File ACL: 0 Directory ACL: 0 Links: 1 Blockcount: 232 Fragment: Address: 0 Number: 0...

Ok, thanks. Except the question was meant slightly different. Less w.r.t. organizing the register classes, and more w.r.t. implementation. I've noticed for instance that when trying to model this straight forwardly by writing a vreg from spills and reading this from fills (not further elaborated here), that the spiller can't handle vreg def-use pairs: there are assertions making sure a

The vnot PatFrag uses ImmAllOnesV which should put an OPC_CheckImmAllOnesV in the matcher table. And the matcher table should call ISD::isBuildVectorAllOnes. I believe we use vnot with vXi1 vectors on X86 and I haven't seen any issues. The FIXME you pointed to seems related to a scalar patcher not a vector pattern. In that case the issue is that the immediate matcher for scalars calls

This is interesting! So are you saying that loop.parallel_accesses strictly loop parallel, and says nothing about aliasing? I see, I guess we may have been "abusing" the hint and re-purposed it. But isn't llvm's vectorizer using loop.parallel_accesses to vectorize loops including vectorize memory accesses that if you ignore loop-carried dependencies, usually means effectively

newbee here. What's the difference between glue and chain? Why can't we add chains to any node we want? On Fri, Jul 17, 2020, 10:25 PM Björn Pettersson A via llvm-dev < llvm-dev at lists.llvm.org> wrote: > Still sounds to me as Glue might help (as already proposed by Craig), but > maybe I’ve misunderstood something. > > > > Another option is to do a simple

I did it by code preparing into an intrinsic that has side effects. Pseudo instruction would work as well. I'm not sure if glue would help, since the nodes A->B, C->D from example above are not necessarily adjacent. More hooks into the selection DAG builder may be an idea for a LLVM extension. For example in this case, custom allowing for a node to be built with an existing chain would

> Chain doesn't guarantee that operations on parallel chains don't get interleaved This would be a sequential chain... > This is the case for all operations expanded as library calls I think their originating node already has a chain (i.e. mem operand or side effect in llvm-ir). My case is a arithmetic node without ordering constraints (divrem) getting lowered into sth that _does_

> No, non-sideeffecting operations can be legalized as compiler-rt calls Right, but not as "regular" nodes with side-effects? I guess you could search and analyze the DAG manually but that seems hacky. Maybe something that one day LLVM could support natively. On Thu, Jul 16, 2020 at 11:55 AM Matt Arsenault <arsenm2 at gmail.com> wrote: > > > On Jul 16, 2020, at

Hi, I'm working on a Kolab related project and wanted to use dovecot on my dev machine. However I'm stuck with the metadata-plugin. I "solved" the permissions problems but now I get dict: Error: file dict commit: file_dotlock_open(~/Maildir/shared-metadata) failed: No such file or directory Before that, I had dict { metadata = file:/var/lib/dovecot/shared-metadata but

Hi, At present I'm setting up several CentOS (4 and 4.4) machines, and in the process of installing the several updates that are automatically mentioned by up2date as being available, I'm running into a package conflict. More particular, when trying to install several of the C compiler related packages (like gcc, cpp, etc.) I get the error message: "Test install failed

Hello, i''m new to puppet (and ruby). I have a problem when using a variable name containing a variable name and containing a reserved variable name : I have a class : class kernel-Linux-binary { $test = $operatingsystem ? { Fedora => "/usr/bin/test", default => undef } } and i want to call "test" and replace Linux by

...w to fix it (see http://mailman.ds9a.nl/pipermail/lartc/2005q3/016728.html). I never received any reaction from the HOWTO maintainers, not even when addressing them directly (see mail below). Given that a month has gone by: Is the HOWTO currently unmaintained? Regards, Georg -- Georg C. F. Greve <greve@fsfeurope.org> Free Software Foundation Europe (http://fsfeurope.org) Join the Fellowship and protect your freedom! (http://www.fsfe.org) _______________________________________________ LARTC mailing list LARTC@mailman.ds9a.nl http...