search for: gprf32

I am attempting to match setcc using tablegen w/ the following patterns: def FEQ : Instruction<(outs GPRF32:$dst), (ins GPRF32:$src0, GPRF32:$src1), "eq $dst, $src0, $src1", [(set GPRF32:$dst, (seteq GPRF32:$src0, GPRF32:$src1))]>; And it is failing stating that the result must be an integer. Is there a way around this other than modifying TargetSelectionDAG.td? Also, why is it assumed t...

It seems that Tablegen is generating intrinsic ID's off by in DAGISel.inc In DAGISel.inc, I have the following pattern: int64_t CN1 = Tmp0->getZExtValue(); // Pattern: (intrinsic_w_chain:f32 103:iPTR, GPRF32:f32:$src0, GPRF32:f32:$src1, GPRF32:f32:$src2) // Emits: (MACRO_FMA_f32:f32 GPRF32:f32:$src0, GPRF32:f32:$src1, GPRF32:f32:$src2) // Pattern complexity = 8 cost = 1 size = 0 if (CN1 == INT64_C(103)) { SDValue N2 = N.getOperand(2); SDValue N3 = N.getOperand(3);...

...custom lower these nodes to target nodes. Then you can specify your own SDNode with your own SDTypeProfile. Evan On Oct 24, 2008, at 4:31 PM, Villmow, Micah wrote: > I am attempting to match setcc using tablegen w/ the following > patterns: > def FEQ : Instruction<(outs GPRF32:$dst), (ins GPRF32:$src0, > GPRF32:$src1), “eq $dst, $src0, $src1”, [(set GPRF32:$dst, (seteq > GPRF32:$src0, GPRF32:$src1))]>; > > And it is failing stating that the result must be an integer. Is > there a way around this other than modifying TargetSelectionDAG.td? > A...

...On Apr 14, 2009, at 6:34 PM, Villmow, Micah wrote: > It seems that Tablegen is generating intrinsic ID’s off by in > DAGISel.inc > > In DAGISel.inc, I have the following pattern: > int64_t CN1 = Tmp0->getZExtValue(); > > // Pattern: (intrinsic_w_chain:f32 103:iPTR, GPRF32:f32:$src0, > GPRF32:f32:$src1, GPRF32:f32:$src2) > // Emits: (MACRO_FMA_f32:f32 GPRF32:f32:$src0, GPRF32:f32:$src1, > GPRF32:f32:$src2) > // Pattern complexity = 8 cost = 1 size = 0 > if (CN1 == INT64_C(103)) { > SDValue N2 = N.getOperand(2); > SDV...

...]>; This allows us to write a multi-def for int_AMDIL_mad like so: defm MAD : TernaryIntrinsicFloat<IL_OP_MAD, int_AMDIL_mad>; Where TernaryIntrinsicFloat is defined as: multiclass TernaryIntrinsicFloat<ILOpCode opcode, Intrinsic intr> { def _f32 : ThreeInOneOut<opcode, (outs GPRF32:$dst), (ins GPRF32:$src, GPRF32:$src2, GPRF32:$src3), !strconcat(opcode.Text, " $dst, $src, $src2, $src3"), [(set GPRF32:$dst, (intr GPRF32:$src, GPRF32:$src2, GPRF32:$src3))]>; def _v2f32 : ThreeInOneOut<opcode, (outs GPRV2F32:$dst), (ins GPRV2F3...

...mad like so: > > defm MAD : TernaryIntrinsicFloat<IL_OP_MAD, int_AMDIL_mad>; > > > > Where TernaryIntrinsicFloat is defined as: > > multiclass TernaryIntrinsicFloat<ILOpCode opcode, Intrinsic intr> > > { > > def _f32 : ThreeInOneOut<opcode, (outs GPRF32:$dst), > > (ins GPRF32:$src, GPRF32:$src2, GPRF32:$src3), > > !strconcat(opcode.Text, " $dst, $src, $src2, $src3"), > > [(set GPRF32:$dst, > > (intr GPRF32:$src, GPRF32:$src2, GPRF32:$src3))]>; > > def _v2f32 : ThreeInOneOut<opc...

...ite a multi-def for int_AMDIL_mad like so: > defm MAD  : TernaryIntrinsicFloat<IL_OP_MAD, int_AMDIL_mad>; > > Where TernaryIntrinsicFloat is defined as: > multiclass TernaryIntrinsicFloat<ILOpCode opcode, Intrinsic intr> > { >  def _f32 : ThreeInOneOut<opcode, (outs GPRF32:$dst), >      (ins GPRF32:$src, GPRF32:$src2, GPRF32:$src3), >      !strconcat(opcode.Text, " $dst, $src, $src2, $src3"), >      [(set GPRF32:$dst, >          (intr GPRF32:$src, GPRF32:$src2, GPRF32:$src3))]>; >  def _v2f32 : ThreeInOneOut<opcode, (outs GPRV2F32:$dst)...

...fm MAD : TernaryIntrinsicFloat<IL_OP_MAD, int_AMDIL_mad>; > > > > > > Where TernaryIntrinsicFloat is defined as: > > > multiclass TernaryIntrinsicFloat<ILOpCode opcode, Intrinsic intr> > > > { > > > def _f32 : ThreeInOneOut<opcode, (outs GPRF32:$dst), > > > (ins GPRF32:$src, GPRF32:$src2, GPRF32:$src3), > > > !strconcat(opcode.Text, " $dst, $src, $src2, $src3"), > > > [(set GPRF32:$dst, > > > (intr GPRF32:$src, GPRF32:$src2, GPRF32:$src3))]>; > > > def _v2f...

...rinsicFloat<IL_OP_MAD, int_AMDIL_mad>; >> > > >> > > Where TernaryIntrinsicFloat is defined as: >> > > multiclass TernaryIntrinsicFloat<ILOpCode opcode, Intrinsic intr> >> > > { >> > >  def _f32 : ThreeInOneOut<opcode, (outs GPRF32:$dst), >> > >      (ins GPRF32:$src, GPRF32:$src2, GPRF32:$src3), >> > >      !strconcat(opcode.Text, " $dst, $src, $src2, $src3"), >> > >      [(set GPRF32:$dst, >> > >          (intr GPRF32:$src, GPRF32:$src2, GPRF32:$src3))]>; >>...

...rinsicFloat<IL_OP_MAD, int_AMDIL_mad>; >> > > >> > > Where TernaryIntrinsicFloat is defined as: >> > > multiclass TernaryIntrinsicFloat<ILOpCode opcode, Intrinsic intr> >> > > { >> > > def _f32 : ThreeInOneOut<opcode, (outs GPRF32:$dst), >> > > (ins GPRF32:$src, GPRF32:$src2, GPRF32:$src3), >> > > !strconcat(opcode.Text, " $dst, $src, $src2, $src3"), >> > > [(set GPRF32:$dst, >> > > (intr GPRF32:$src, GPRF32:$src2, GPRF32:$src3))]>; >>...

...int_AMDIL_mad>; > >> > > > >> > > Where TernaryIntrinsicFloat is defined as: > >> > > multiclass TernaryIntrinsicFloat<ILOpCode opcode, Intrinsic intr> > >> > > { > >> > > def _f32 : ThreeInOneOut<opcode, (outs GPRF32:$dst), > >> > > (ins GPRF32:$src, GPRF32:$src2, GPRF32:$src3), > >> > > !strconcat(opcode.Text, " $dst, $src, $src2, $src3"), > >> > > [(set GPRF32:$dst, > >> > > (intr GPRF32:$src, GPRF32:$src2, GPRF32:$s...

...int_AMDIL_mad>; > >> > > > >> > > Where TernaryIntrinsicFloat is defined as: > >> > > multiclass TernaryIntrinsicFloat<ILOpCode opcode, Intrinsic intr> > >> > > { > >> > > def _f32 : ThreeInOneOut<opcode, (outs GPRF32:$dst), > >> > > (ins GPRF32:$src, GPRF32:$src2, GPRF32:$src3), > >> > > !strconcat(opcode.Text, " $dst, $src, $src2, $src3"), > >> > > [(set GPRF32:$dst, > >> > > (intr GPRF32:$src, GPRF32:$src2, GPRF32:$s...

On Mon, Nov 21, 2011 at 5:31 PM, Justin Holewinski <justin.holewinski at gmail.com> wrote: > On Mon, Nov 21, 2011 at 11:45 AM, Alberto Magni <alberto.magni86 at gmail.com> > wrote: >> >> On Mon, Nov 21, 2011 at 3:36 PM, Justin Holewinski >> <justin.holewinski at gmail.com> wrote: >> > On Mon, Nov 21, 2011 at 7:01 AM, Alberto Magni >> >

...nt_opencl_math_fdistance_fast : Intrinsic<[llvm_float_ty], > [llvm_anyfloat_ty, LLVMMatchType<0>]>; > > The problem comes when I try to use the intrinsic. It gives me the > following error: > GPRV2F32:f32:$src1 MACRO_DISTANCE_FAST_v2f32: (set GPRF32:f32:$dst, > (intrinsic_w_chain:f32 84:iPTR, GPRV2F32:v2f32:$src0, > GPRV2F32:f32:$src1)) > TableGen.exe: In MACRO_DISTANCE_FAST_v2f32: Type inference > contradiction > found in node! Your "$src1" is f32 instead of v2f32. I've run into some problems like this befor...

If I force it to use v2f32 for my register class, it still fails with: d:\hq\main\sw\appeng\tools\hpc\opencl\compiler\llvm\test\AMDIL>TableGen. exe -gen -dag-isel -I../../include/ test.td > output GPRV2F32:v2f32:$src1 MACRO_DISTANCE_FAST_v2f32: (set GPRF32:f32:$dst, (i ntrinsic_w_chain:f32 84:iPTR, GPRV2F32:v2f32:$src0, GPRV2F32:v2f32:$src1)) TableGen.exe: In MACRO_DISTANCE_FAST_v2f32: Type inference contradiction found i n node! So I'm not sure that is the problem. Also, my register classes only accept one register type, so there is no valid wa...

On Mon, Nov 21, 2011 at 11:45 AM, Alberto Magni <alberto.magni86 at gmail.com>wrote: > On Mon, Nov 21, 2011 at 3:36 PM, Justin Holewinski > <justin.holewinski at gmail.com> wrote: > > On Mon, Nov 21, 2011 at 7:01 AM, Alberto Magni < > alberto.magni86 at gmail.com> > > wrote: > >> > >> Hi Justin, > >> > >> attached you find

...insic definition: def int_opencl_math_fdistance_fast : Intrinsic<[llvm_float_ty], [llvm_anyfloat_ty, LLVMMatchType<0>]>; The problem comes when I try to use the intrinsic. It gives me the following error: GPRV2F32:f32:$src1 MACRO_DISTANCE_FAST_v2f32: (set GPRF32:f32:$dst, (intrinsic_w_chain:f32 84:iPTR, GPRV2F32:v2f32:$src0, GPRV2F32:f32:$src1)) TableGen.exe: In MACRO_DISTANCE_FAST_v2f32: Type inference contradiction found in node! I'm using the following test td file. This is generated with putting it in include and running the command Tablegen.exe...

...gt; If I force it to use v2f32 for my register class, it still fails with: > d:\hq\main\sw\appeng\tools\hpc\opencl\compiler\llvm\test > \AMDIL>TableGen. > exe -gen > -dag-isel -I../../include/ test.td > output > GPRV2F32:v2f32:$src1 MACRO_DISTANCE_FAST_v2f32: (set > GPRF32:f32:$dst, (i > ntrinsic_w_chain:f32 84:iPTR, GPRV2F32:v2f32:$src0, > GPRV2F32:v2f32:$src1)) > TableGen.exe: In MACRO_DISTANCE_FAST_v2f32: Type inference > contradiction > found i > n node! > > So I'm not sure that is the problem. Also, my register classes only > acc...

...nt_opencl_math_fdistance_fast   : Intrinsic<[llvm_float_ty], >                           [llvm_anyfloat_ty, LLVMMatchType<0>]>; > > The problem comes when I try to use the intrinsic. It gives me the > following error: > GPRV2F32:f32:$src1 MACRO_DISTANCE_FAST_v2f32:   (set GPRF32:f32:$dst, > (intrinsic_w_chain:f32 84:iPTR, GPRV2F32:v2f32:$src0, > GPRV2F32:f32:$src1)) > TableGen.exe: In MACRO_DISTANCE_FAST_v2f32: Type inference contradiction > found in node! > > I'm using the following test td file. > > This is generated with putting it in include...

Oops. That was premature. I think your original question was on the right track. TableGen distinguishes between known and "overloaded" types (like "llvm_anyfloat_ty" in your example). The overloaded types are numbered separately, and the argument to LLVMMatchType is an index into these overloaded types, ignoring the known types. So, in your case, the first